]> Joshua Wise's Git repositories - firearm.git/shortlog
firearm.git
2009-01-31 Joshua WiseMemory: Split out bus address and data control logic...
2009-01-31 Joshua WiseMemory: Move offset, addr, and raddr to address generat...
2009-01-31 Joshua WiseMemory: Move all bus control logic to its own always...
2009-01-31 Joshua WiseMemory: Move coprocessor and register outputs to their...
2009-01-31 Joshua WiseMemory: Move all state machine code out to its own...
2009-01-31 Joshua WiseMemory: Remove magic numbers from state machines.
2009-01-25 Joshua WiseIssue, system, RegFile: First pass at adding resets.
2009-01-25 Joshua Wisetests/Makefile: Add a target to pad binaries for Xilinx...
2009-01-25 Joshua WiseMemory: Fix up a constant that was typoed and malformed.
2009-01-24 Joshua WiseDCache, ICache: Make cache_data a 1-D array to enable...
2009-01-24 Joshua WiseSystem, Terminal: Provide real-world outputs on non...
2009-01-24 Joshua WiseFetch: Fix async reset to actually not do it wrong.
2009-01-24 Joshua WiseIssue: Use wires, since again XST can't always @(cpsr_i...
2009-01-24 Joshua WiseRegFile: Move to assigns, since XST can't always @...
2009-01-24 Joshua WiseDCache, ICache: Move curdata out to its own wire for...
2009-01-24 Joshua WiseBigBlockRAM: Remove excess F.
2009-01-24 Joshua WiseExecute: Split things out into their own always blocks...
2009-01-24 Joshua WiseDecode: De-UNOPTFLAT it.
2009-01-24 Joshua WiseAdd a BigBlockRAM that's 8MB (and obviously not very...
2009-01-24 Joshua Wisetests/*.hex: Update hex files.
2009-01-24 Joshua WiseAdd a .gitattributes file to force hex files to be...
2009-01-24 Joshua Wisetests/miniblarg: Make the ROM easier to read.
2009-01-24 Joshua WiseTerminal: Add support for reading characters.
2009-01-24 Joshua WiseMemory: Add STRB support, en manera de A.
2009-01-23 Joshua Wisetests/u-boot.hex: Add initial hex file.
2009-01-23 Joshua WiseExecute: Fix carry flag on subtraction operations.
2009-01-23 Joshua WiseIssue: Fix case in which lr is read in the instruction...
2009-01-22 Joshua Wisetests/testbench: Commit new .hex file built with -O3...
2009-01-22 Joshua WiseExecute: Branches allow somebody else to take precedenc...
2009-01-22 Joshua WiseFetch: Allow new queued jumps to take precedence over...
2009-01-22 Joshua Wisesystem, Writeback, Memory, Execute: Only update the...
2009-01-21 Joshua WiseDCache/ICache: reg i -> integer i
2009-01-19 Joshua WiseIssue: Fix use_regs for LDRSTR when not acting on an...
2009-01-19 Joshua WiseMemory: Fix the case where a LDM/LDR/LDRH/STM/STR/STRH...
2009-01-19 Joshua WiseMemory: Add one more state to lsr/lsrh/lsm to force...
2009-01-18 Joshua WiseMemory: Fix bug in which multiplies would cause a HDATA...
2009-01-18 Joshua Wisetests/testbench: Add miniblarg. Put ldm_bonehead in...
2009-01-18 Joshua Wisetests/Makefile: Add CFLAGS for LOL2FAST2FURIOUS.
2009-01-18 Joshua WiseMemory: Change offset latch in LDM so that there is...
2009-01-17 Joshua Wisetests/testbench: Update output formatting for testbench.
2009-01-17 Joshua WiseDCache/ICache: Invalidate while filling, so if the...
2009-01-15 Joshua Wisetests/testbench: Allow compilation on x86.
2009-01-15 Joshua WiseDCache: Be more verbose about fills.
2009-01-15 Joshua WiseBlockRAM: Write before read so that reads the next...
2009-01-15 Joshua WiseExecute: fix rdiff
2009-01-14 Joshua WiseMemory: Add delayed flush. Make outbubble correct...
2009-01-14 Joshua WiseExecute: Fix outbubble on multiplier so that it remembe...
2009-01-14 Joshua WiseExecute: Add delayed flush logic.
2009-01-14 Joshua WiseICache and DCache: Do not accept fill data if the bus_r...
2009-01-14 Joshua WiseIssue: Add logic to defer a flush if need be (i.e....
2009-01-14 Joshua Wisetests/costas: respin .hex
2009-01-14 Joshua Wisetests: Add the new testbench.
2009-01-14 Joshua Wiseanulib: move the stack ALL the way up
2009-01-14 Joshua WiseFetch: Also queue up a jump if we are stalled.
2009-01-13 Joshua WiseDCache: Change verbosity.
2009-01-13 Joshua Wisesystem: Swap ICache and DCache in arbiter order.
2009-01-13 Joshua Wiseanulib: Move the stack up.
2009-01-11 Joshua WiseCostas: Remove while(1) and allow proper returns.
2009-01-11 Joshua WiseMemory: Instrument LDMSTM. Do not write back if writeb...
2009-01-11 Joshua WiseDCache: Add instrumentation.
2009-01-11 Joshua WiseMemory: Fix FSM for LDR/STR. Fix pre/post increment...
2009-01-10 Joshua WiseDecode: Fix conditional for immediate mode.
2009-01-10 Joshua Wisesystem: Fix message printed by DECODE debug line to...
2009-01-10 Joshua WiseEnable part 2 of the Costas test program.
2009-01-10 Joshua WiseAdd tests directory.
2009-01-10 Joshua WiseDCache, ICache: Reset fill circuitry if a request is...
2009-01-10 Joshua WiseFetch: qjmp is for queueing up jumps while rd_waiting...
2009-01-10 Joshua Wisesystem: Print the correct values for jmp for Execute.
2009-01-10 Joshua WiseDCache: Fix silly bug involving failing to clear bus_wr.
2009-01-10 Joshua WiseFetch: Rewrite to be cleaner.
2009-01-10 Joshua WiseTerminal: Add `ifdef verilator around the $c construct.
2009-01-10 Joshua Wisesystem: Fix bug that would cause stmia not to work.
2009-01-10 Joshua WiseMemory: wire -> reg in some cases
2009-01-10 Joshua WiseICache: Add instrumentation.
2009-01-10 Joshua WiseExecute: Fix jumps while flush asserted. Set lr correc...
2009-01-10 Christopher LuMerge branch 'master' of nyus.joshuawise.com:/git/firearm
2009-01-10 Christopher Luunique values for the shits
2009-01-09 Joshua Wiseram: Add a string printing test, WHICH WORKS!
2009-01-09 Joshua WiseDecode: Fix stupid bug in which stalls did not stall...
2009-01-09 Joshua WiseMerge nyus:/storage/git/firearm
2009-01-09 Joshua WiseAdd 'mov r1, #':' to ramfile.
2009-01-09 Joshua WiseHit all with the integrate.
2009-01-09 Joshua WiseWriteback: add
2009-01-09 Christopher Lumemory: fix
2009-01-09 Christopher Ludecode: stuff for halfword
2009-01-09 Christopher Lumemory wea
2009-01-09 Christopher Lublockram: more fix
2009-01-09 Christopher LuMerge branch 'master' of nyus.joshuawise.com:/git/firearm
2009-01-09 Christopher Lublockram: fix hack, memory: add ldrh/strh
2009-01-09 Joshua Wiseram.hex: Add performance benchmark, P-SPEC 2009.
2009-01-09 Joshua WiseMemory: Add some debugging.
2009-01-09 Joshua WiseAdd terminal
2009-01-07 Joshua Wisesystem: Wire up outcpsr and outspsr from Execute to...
2009-01-07 Joshua WiseDecode: Set correct rpc for coprocessor register transfer.
2009-01-07 Joshua WiseAdd special CPSR behavior for ARM MCR.
2009-01-07 Joshua WiseAdd LDR test instruction.
2009-01-07 Christopher Lumemory: bubble
2009-01-07 Christopher Lumemory: merged
2009-01-07 Christopher Lumemory.v: convert to state machines
2009-01-07 Joshua WiseMemory: Add CDP and MRC/MCR.
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