BlockRAM: Write before read so that reads the next cycle return the right answer.
authorJoshua Wise <joshua@rebirth.joshuawise.com>
Thu, 15 Jan 2009 07:44:23 +0000 (02:44 -0500)
committerJoshua Wise <joshua@rebirth.joshuawise.com>
Thu, 15 Jan 2009 07:44:23 +0000 (02:44 -0500)
BlockRAM.v

index a86ec75..e0eceeb 100644 (file)
@@ -31,7 +31,7 @@ module BlockRAM(
        always @(posedge clk)
        begin
                if (bus_wr && decode)
-                       data[ramaddr[13:2]] <= bus_wdata;
+                       data[ramaddr[13:2]] = bus_wdata;
                
                /* This is not allowed to be conditional -- stupid Xilinx
                 * blockram. */
This page took 0.020654 seconds and 4 git commands to generate.