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BlockRAM: Write before read so that reads the next cycle return the right answer.
author
Joshua Wise
<joshua@rebirth.joshuawise.com>
Thu, 15 Jan 2009 07:44:23 +0000
(
02:44
-0500)
committer
Joshua Wise
<joshua@rebirth.joshuawise.com>
Thu, 15 Jan 2009 07:44:23 +0000
(
02:44
-0500)
BlockRAM.v
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diff --git
a/BlockRAM.v
b/BlockRAM.v
index
a86ec75
..
e0eceeb
100644
(file)
--- a/
BlockRAM.v
+++ b/
BlockRAM.v
@@
-31,7
+31,7
@@
module BlockRAM(
always @(posedge clk)
begin
if (bus_wr && decode)
- data[ramaddr[13:2]]
<
= bus_wdata;
+ data[ramaddr[13:2]] = bus_wdata;
/* This is not allowed to be conditional -- stupid Xilinx
* blockram. */
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