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Joshua Wise's Git repositories - fpgaboy.git/log
Joshua Wise [Sun, 13 Apr 2008 09:44:09 +0000 (05:44 -0400)]
Add mock up LCDC
Joshua Wise [Sun, 13 Apr 2008 07:29:25 +0000 (03:29 -0400)]
Add DI/EI delay test. Add LD M, A.
Joshua Wise [Tue, 8 Apr 2008 19:52:11 +0000 (15:52 -0400)]
INC -> INCDEC
Joshua Wise [Mon, 7 Apr 2008 06:50:15 +0000 (02:50 -0400)]
Don't print A until we have to.
Joshua Wise [Mon, 7 Apr 2008 06:33:39 +0000 (02:33 -0400)]
ALU8IMM
Joshua Wise [Mon, 7 Apr 2008 02:57:28 +0000 (22:57 -0400)]
Wire switches back up and remove cclk.
Joshua Wise [Mon, 7 Apr 2008 02:51:14 +0000 (22:51 -0400)]
It works.
Joshua Wise [Mon, 7 Apr 2008 02:41:09 +0000 (22:41 -0400)]
It works, but why?
Joshua Wise [Sun, 6 Apr 2008 23:22:15 +0000 (19:22 -0400)]
PUSH bugfix
Joshua Wise [Sun, 6 Apr 2008 22:46:27 +0000 (18:46 -0400)]
New generation makefile. Code that will reliably break the machine.
Joshua Wise [Sun, 6 Apr 2008 08:36:51 +0000 (04:36 -0400)]
Rework it all to use the new macros.
Joshua Wise [Sun, 6 Apr 2008 07:56:04 +0000 (03:56 -0400)]
Cleanups to make code nicer looking. ALU subtraction fixes.
Joshua Wise [Sun, 6 Apr 2008 07:34:31 +0000 (03:34 -0400)]
Finish splitting out functions.
Joshua Wise [Sun, 6 Apr 2008 07:03:30 +0000 (03:03 -0400)]
Split out more insns
Joshua Wise [Sun, 6 Apr 2008 06:26:07 +0000 (02:26 -0400)]
Clean up some warnings.
Joshua Wise [Sun, 6 Apr 2008 06:14:45 +0000 (02:14 -0400)]
Start refactoring instructions.
Joshua Wise [Sun, 6 Apr 2008 05:04:37 +0000 (01:04 -0400)]
Bugfix for SCF
Joshua Wise [Sun, 6 Apr 2008 05:03:29 +0000 (01:03 -0400)]
Some reworks to prepare for transition to makefile. Stack bugfixes.
Joshua Wise [Sat, 5 Apr 2008 04:56:08 +0000 (00:56 -0400)]
Test interrupts. They work!
Joshua Wise [Sat, 5 Apr 2008 04:34:42 +0000 (00:34 -0400)]
Cut 1 at interrupt support for CPU
Joshua Wise [Fri, 4 Apr 2008 08:27:50 +0000 (04:27 -0400)]
Poke the LEDs. YOUR MOM WAS TOO WIDE
Joshua Wise [Fri, 4 Apr 2008 08:23:12 +0000 (04:23 -0400)]
Timer works.
Joshua Wise [Fri, 4 Apr 2008 07:55:37 +0000 (03:55 -0400)]
First cut at timer
Joshua Wise [Fri, 4 Apr 2008 07:20:54 +0000 (03:20 -0400)]
Add inc16 test, and inc16 and dec16.
Joshua Wise [Fri, 4 Apr 2008 06:10:58 +0000 (02:10 -0400)]
Yay. Fix retcc. Comparing against an x value - great idea, or greatest idea?
Joshua Wise [Fri, 4 Apr 2008 05:50:36 +0000 (01:50 -0400)]
RETCC that breaks everything. Why?
Joshua Wise [Fri, 4 Apr 2008 03:52:44 +0000 (23:52 -0400)]
Update the 7seg more often.
Joshua Wise [Fri, 4 Apr 2008 03:49:55 +0000 (23:49 -0400)]
Convert the test to use jr
Joshua Wise [Fri, 4 Apr 2008 03:46:50 +0000 (23:46 -0400)]
JR and JRCC
Joshua Wise [Fri, 4 Apr 2008 03:09:44 +0000 (23:09 -0400)]
Add JP HL, add CALL CC
Joshua Wise [Thu, 3 Apr 2008 09:38:14 +0000 (05:38 -0400)]
Add an instruction tester to the test ROM.
Joshua Wise [Thu, 3 Apr 2008 06:11:10 +0000 (02:11 -0400)]
Fuck shell scripts, we use makefiles here
Joshua Wise [Thu, 3 Apr 2008 06:02:47 +0000 (02:02 -0400)]
Update perms on buildrom.sh.
Joshua Wise [Thu, 3 Apr 2008 06:00:37 +0000 (02:00 -0400)]
Add buildrom.sh. Add some comments of note in System.v.
Joshua Wise [Wed, 2 Apr 2008 09:09:21 +0000 (05:09 -0400)]
Tweak the sign on a bit
Joshua Wise [Wed, 2 Apr 2008 09:08:08 +0000 (05:08 -0400)]
Add a ROM, and go up to 8k of RAM
Joshua Wise [Wed, 2 Apr 2008 05:21:42 +0000 (01:21 -0400)]
Working RAM :D
Joshua Wise [Wed, 2 Apr 2008 03:48:24 +0000 (23:48 -0400)]
Add files, and add a freezeswitch to debug this issue with push no type check.
Joshua Wise [Wed, 2 Apr 2008 03:25:12 +0000 (23:25 -0400)]
Fix bug in UART where idle state is not entered by default
Joshua Wise [Tue, 1 Apr 2008 08:35:57 +0000 (04:35 -0400)]
Hello, Z80!
Joshua Wise [Tue, 1 Apr 2008 08:35:04 +0000 (04:35 -0400)]
Hello, Z80!
Joshua Wise [Tue, 1 Apr 2008 08:11:17 +0000 (04:11 -0400)]
Test RAM
Joshua Wise [Tue, 1 Apr 2008 07:47:54 +0000 (03:47 -0400)]
Poke the UART with a stick.
ABABABABABABAB
Joshua Wise [Tue, 1 Apr 2008 07:26:08 +0000 (03:26 -0400)]
Fix not-taken jumps. Add more ALU ops. Add ALU A ops.
Joshua Wise [Tue, 1 Apr 2008 07:18:26 +0000 (03:18 -0400)]
Test JP and JP cc
Joshua Wise [Tue, 1 Apr 2008 05:26:45 +0000 (01:26 -0400)]
JP
Joshua Wise [Tue, 1 Apr 2008 03:58:32 +0000 (23:58 -0400)]
Spit lots of A out of the UART.
Joshua Wise [Tue, 1 Apr 2008 03:14:16 +0000 (23:14 -0400)]
Get it running on the board.
Joshua Wise [Mon, 31 Mar 2008 11:09:14 +0000 (07:09 -0400)]
HALP ABOUT TO BLOW AWY PROJECT
Joshua Wise [Mon, 31 Mar 2008 06:58:27 +0000 (02:58 -0400)]
Fix RAM bugs with kludge. Fix CALL bug. CALL test case.
Joshua Wise [Mon, 31 Mar 2008 06:22:45 +0000 (02:22 -0400)]
Add CALL (untested) and ROM and internal RAM
Joshua Wise [Mon, 31 Mar 2008 03:46:49 +0000 (23:46 -0400)]
Fix part of the indentation tragedy.
Joshua Wise [Mon, 31 Mar 2008 03:34:09 +0000 (23:34 -0400)]
Add RET/IRET. Fix a bug in RST where the PC pushed to the stack was incorrect.
Joshua Wise [Mon, 31 Mar 2008 00:23:36 +0000 (20:23 -0400)]
RST insn
Joshua Wise [Sun, 30 Mar 2008 10:33:25 +0000 (06:33 -0400)]
NOP, and bug fixes
Joshua Wise [Sun, 30 Mar 2008 10:28:24 +0000 (06:28 -0400)]
Test XOR
Joshua Wise [Sun, 30 Mar 2008 10:04:28 +0000 (06:04 -0400)]
ADC, AND, OR, XOR
Joshua Wise [Sun, 30 Mar 2008 09:42:47 +0000 (05:42 -0400)]
Our first ALU operation -- ADD
Joshua Wise [Sun, 30 Mar 2008 07:41:07 +0000 (03:41 -0400)]
LD{D,I} A,(HL) and LD{D,I} (HL),A
Joshua Wise [Sun, 30 Mar 2008 07:06:08 +0000 (03:06 -0400)]
LDH A,(C) and LDH (C), A
Joshua Wise [Sat, 29 Mar 2008 08:22:48 +0000 (04:22 -0400)]
Add UCF for the z80 core
Joshua Wise [Sat, 29 Mar 2008 08:22:15 +0000 (04:22 -0400)]
update ISE project
Joshua Wise [Sat, 29 Mar 2008 08:15:58 +0000 (04:15 -0400)]
Make it synthesizable.
Joshua Wise [Sat, 29 Mar 2008 08:12:10 +0000 (04:12 -0400)]
PUSH and POP work
Joshua Wise [Sat, 29 Mar 2008 07:42:26 +0000 (03:42 -0400)]
LD reg, imm16 and LD SP,HL
Joshua Wise [Sat, 29 Mar 2008 06:46:01 +0000 (02:46 -0400)]
LD with HLs
Joshua Wise [Sat, 29 Mar 2008 06:24:43 +0000 (02:24 -0400)]
LD reg, reg
Joshua Wise [Sat, 29 Mar 2008 05:36:50 +0000 (01:36 -0400)]
Initial
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