Fix bug in UART where idle state is not entered by default

diff --git a/Uart.v b/Uart.v
index a036c64e5ad7858422f27515730da6d13c15c9d0..f87005dfc2aaa9b0b5af9fc322acec14a78c5c2f 100644 (file)
--- a/Uart.v
+++ b/Uart.v
@@ -9,7 +9,7 @@ module UART(
        input rd,
        input [15:0] addr,
        inout [7:0] data,
-       output reg serial);
+       output reg serial = 1);
        
        wire decode = (addr == `MMAP_ADDR);