tests/*.hex: Update hex files.
[firearm.git] / system.v
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1`define BUS_ICACHE 1
2`define BUS_DCACHE 0
ee406839 3
f61f8d6f 4module System(input clk);
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5 wire [7:0] bus_req;
6 wire [7:0] bus_ack;
7 wire [31:0] bus_addr;
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8 wire [31:0] bus_rdata;
9 wire [31:0] bus_wdata;
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10 wire bus_rd, bus_wr;
11 wire bus_ready;
45fa96c0 12
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13 wire bus_req_icache;
14 wire bus_req_dcache;
e3a9107a 15 assign bus_req = {6'b0, bus_req_icache, bus_req_dcache};
ee406839 16 wire bus_ack_icache = bus_ack[`BUS_ICACHE];
03f45381 17 wire bus_ack_dcache = bus_ack[`BUS_DCACHE];
45fa96c0 18
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19 wire [31:0] bus_addr_icache;
20 wire [31:0] bus_wdata_icache;
21 wire bus_rd_icache;
22 wire bus_wr_icache;
23
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24 wire [31:0] bus_addr_dcache;
25 wire [31:0] bus_wdata_dcache;
26 wire bus_rd_dcache;
27 wire bus_wr_dcache;
28
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29 wire [31:0] bus_rdata_blockram;
30 wire bus_ready_blockram;
31
03f45381 32 assign bus_addr = bus_addr_icache | bus_addr_dcache;
a0bb35e7 33 assign bus_rdata = bus_rdata_blockram;
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34 assign bus_wdata = bus_wdata_icache | bus_wdata_dcache;
35 assign bus_rd = bus_rd_icache | bus_rd_dcache;
36 assign bus_wr = bus_wr_icache | bus_wr_dcache;
a0bb35e7 37 assign bus_ready = bus_ready_blockram;
149bcd1a 38
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39 wire [31:0] icache_rd_addr;
40 wire icache_rd_req;
41 wire icache_rd_wait;
42 wire [31:0] icache_rd_data;
09e28f01 43
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44 wire [31:0] dcache_addr;
45 wire dcache_rd_req, dcache_wr_req;
46 wire dcache_rw_wait;
47 wire [31:0] dcache_wr_data, dcache_rd_data;
48
ab7ee9fc 49 wire [31:0] decode_out_op0, decode_out_op1, decode_out_op2, decode_out_spsr, decode_out_cpsr;
42c1e610 50 wire decode_out_carry;
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51
52 wire [3:0] regfile_read_0, regfile_read_1, regfile_read_2, regfile_read_3;
53 wire [31:0] regfile_rdata_0, regfile_rdata_1, regfile_rdata_2, regfile_rdata_3, regfile_spsr;
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54 wire regfile_write;
55 wire [3:0] regfile_write_reg;
56 wire [31:0] regfile_write_data;
c65110a8 57
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58 wire execute_out_write_reg;
59 wire [3:0] execute_out_write_num;
60 wire [31:0] execute_out_write_data;
c65110a8 61 wire [31:0] execute_out_op0, execute_out_op1, execute_out_op2;
1e66d5d1 62 wire [31:0] execute_out_cpsr, execute_out_spsr;
fdecc897 63 wire execute_out_cpsrup;
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64
65 wire jmp_out_execute, jmp_out_writeback;
66 wire [31:0] jmppc_out_execute, jmppc_out_writeback;
67 wire jmp = jmp_out_execute | jmp_out_writeback;
68 wire [31:0] jmppc = jmppc_out_execute | jmppc_out_writeback;
5ca27949 69
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70 wire memory_out_write_reg;
71 wire [3:0] memory_out_write_num;
72 wire [31:0] memory_out_write_data;
ab7ee9fc 73 wire [31:0] memory_out_cpsr, memory_out_spsr;
fdecc897 74 wire memory_out_cpsrup;
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75
76 wire [31:0] writeback_out_cpsr, writeback_out_spsr;
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77
78 wire cp_ack_terminal;
79 wire cp_busy_terminal;
80 wire [31:0] cp_read_terminal;
c65110a8 81
43e4332c 82 wire cp_req;
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83 wire [31:0] cp_insn;
84 wire cp_ack = cp_ack_terminal;
85 wire cp_busy = cp_busy_terminal;
43e4332c 86 wire cp_rnw;
1d97a095 87 wire [31:0] cp_read = cp_read_terminal;
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88 wire [31:0] cp_write;
89
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90 wire stall_cause_issue;
91 wire stall_cause_execute;
92 wire stall_cause_memory;
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93 wire bubble_out_fetch;
94 wire bubble_out_issue;
2393422a 95 wire bubble_out_execute;
c65110a8 96 wire bubble_out_memory;
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97 wire [31:0] insn_out_fetch;
98 wire [31:0] insn_out_issue;
2393422a 99 wire [31:0] insn_out_execute;
c65110a8 100 wire [31:0] insn_out_memory;
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101 wire [31:0] pc_out_fetch;
102 wire [31:0] pc_out_issue;
2393422a 103 wire [31:0] pc_out_execute;
c65110a8 104 wire [31:0] pc_out_memory;
149bcd1a 105
7947b9c7 106 wire execute_out_backflush;
ab7ee9fc 107 wire writeback_out_backflush;
c2b9d4b7 108
ee406839 109 BusArbiter busarbiter(.bus_req(bus_req), .bus_ack(bus_ack));
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110
111 ICache icache(
112 .clk(clk),
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113 /* XXX reset? */
114 .rd_addr(icache_rd_addr), .rd_req(icache_rd_req),
115 .rd_wait(icache_rd_wait), .rd_data(icache_rd_data),
ee406839 116 .bus_req(bus_req_icache), .bus_ack(bus_ack_icache),
a0bb35e7 117 .bus_addr(bus_addr_icache), .bus_rdata(bus_rdata),
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118 .bus_wdata(bus_wdata_icache), .bus_rd(bus_rd_icache),
119 .bus_wr(bus_wr_icache), .bus_ready(bus_ready));
45fa96c0 120
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121 DCache dcache(
122 .clk(clk),
123 .addr(dcache_addr), .rd_req(dcache_rd_req), .wr_req(dcache_wr_req),
124 .rw_wait(dcache_rw_wait), .wr_data(dcache_wr_data), .rd_data(dcache_rd_data),
125 .bus_req(bus_req_dcache), .bus_ack(bus_ack_dcache),
126 .bus_addr(bus_addr_dcache), .bus_rdata(bus_rdata),
127 .bus_wdata(bus_wdata_dcache), .bus_rd(bus_rd_dcache),
128 .bus_wr(bus_wr_dcache), .bus_ready(bus_ready));
129
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130 BlockRAM blockram(
131 .clk(clk),
132 .bus_addr(bus_addr), .bus_rdata(bus_rdata_blockram),
133 .bus_wdata(bus_wdata), .bus_rd(bus_rd), .bus_wr(bus_wr),
134 .bus_ready(bus_ready_blockram));
135
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136 Fetch fetch(
137 .clk(clk),
f61f8d6f 138 .Nrst(1'b1 /* XXX */),
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139 .rd_addr(icache_rd_addr), .rd_req(icache_rd_req),
140 .rd_wait(icache_rd_wait), .rd_data(icache_rd_data),
149bcd1a 141 .stall(stall_cause_issue), .jmp(jmp), .jmppc(jmppc),
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142 .bubble(bubble_out_fetch), .insn(insn_out_fetch),
143 .pc(pc_out_fetch));
144
145 Issue issue(
146 .clk(clk),
f61f8d6f 147 .Nrst(1'b1 /* XXX */),
ab7ee9fc 148 .stall(stall_cause_execute), .flush(execute_out_backflush | writeback_out_backflush),
09e28f01 149 .inbubble(bubble_out_fetch), .insn(insn_out_fetch),
ab7ee9fc 150 .inpc(pc_out_fetch), .cpsr(writeback_out_cpsr),
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151 .outstall(stall_cause_issue), .outbubble(bubble_out_issue),
152 .outpc(pc_out_issue), .outinsn(insn_out_issue));
90ff449a 153
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154 RegFile regfile(
155 .clk(clk),
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156 .read_0(regfile_read_0), .read_1(regfile_read_1), .read_2(regfile_read_2), .read_3(regfile_read_3),
157 .rdata_0(regfile_rdata_0), .rdata_1(regfile_rdata_1), .rdata_2(regfile_rdata_2), .rdata_3(regfile_rdata_3),
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158 .spsr(regfile_spsr),
159 .write(regfile_write), .write_reg(regfile_write_reg), .write_data(regfile_write_data));
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160
161 Decode decode(
162 .clk(clk),
e74c7936 163 .stall(stall_cause_execute),
ab7ee9fc 164 .insn(insn_out_fetch), .inpc(pc_out_fetch), .incpsr(writeback_out_cpsr), .inspsr(writeback_out_spsr),
5ca27949 165 .op0(decode_out_op0), .op1(decode_out_op1), .op2(decode_out_op2),
ab7ee9fc 166 .carry(decode_out_carry), .outcpsr(decode_out_cpsr), .outspsr(decode_out_spsr),
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167 .read_0(regfile_read_0), .read_1(regfile_read_1), .read_2(regfile_read_2),
168 .rdata_0(regfile_rdata_0), .rdata_1(regfile_rdata_1), .rdata_2(regfile_rdata_2));
169
bc572c5f 170 Execute execute(
f61f8d6f 171 .clk(clk), .Nrst(1'b0),
ab7ee9fc 172 .stall(stall_cause_memory), .flush(writeback_out_backflush),
bc572c5f 173 .inbubble(bubble_out_issue), .pc(pc_out_issue), .insn(insn_out_issue),
ab7ee9fc 174 .cpsr(decode_out_cpsr), .spsr(decode_out_spsr), .op0(decode_out_op0), .op1(decode_out_op1),
bc572c5f 175 .op2(decode_out_op2), .carry(decode_out_carry),
2393422a 176 .outstall(stall_cause_execute), .outbubble(bubble_out_execute),
bc572c5f 177 .write_reg(execute_out_write_reg), .write_num(execute_out_write_num),
149bcd1a 178 .write_data(execute_out_write_data),
ab7ee9fc 179 .jmp(jmp_out_execute), .jmppc(jmppc_out_execute),
c65110a8 180 .outpc(pc_out_execute), .outinsn(insn_out_execute),
1e66d5d1 181 .outop0(execute_out_op0), .outop1(execute_out_op1), .outop2(execute_out_op2),
fdecc897 182 .outcpsr(execute_out_cpsr), .outspsr(execute_out_spsr), .outcpsrup(execute_out_cpsrup));
7947b9c7 183 assign execute_out_backflush = jmp;
c65110a8 184
1d97a095 185 assign cp_insn = insn_out_execute;
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186 Memory memory(
187 .clk(clk), .Nrst(1'b0),
ab7ee9fc 188 /* stall? */ .flush(writeback_out_backflush),
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189 .busaddr(dcache_addr), .rd_req(dcache_rd_req), .wr_req(dcache_wr_req),
190 .rw_wait(dcache_rw_wait), .wr_data(dcache_wr_data), .rd_data(dcache_rd_data),
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191 .st_read(regfile_read_3), .st_data(regfile_rdata_3),
192 .inbubble(bubble_out_execute), .pc(pc_out_execute), .insn(insn_out_execute),
193 .op0(execute_out_op0), .op1(execute_out_op1), .op2(execute_out_op2),
fdecc897 194 .spsr(execute_out_spsr), .cpsr(execute_out_cpsr), .cpsrup(execute_out_cpsrup),
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195 .write_reg(execute_out_write_reg), .write_num(execute_out_write_num), .write_data(execute_out_write_data),
196 .outstall(stall_cause_memory), .outbubble(bubble_out_memory),
197 .outpc(pc_out_memory), .outinsn(insn_out_memory),
198 .out_write_reg(memory_out_write_reg), .out_write_num(memory_out_write_num),
43e4332c 199 .out_write_data(memory_out_write_data),
ab7ee9fc 200 .cp_req(cp_req), .cp_ack(cp_ack), .cp_busy(cp_busy), .cp_rnw(cp_rnw), .cp_read(cp_read), .cp_write(cp_write),
fdecc897 201 .outcpsr(memory_out_cpsr), .outspsr(memory_out_spsr), .outcpsrup(memory_out_cpsrup) /* XXX data_size */);
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202
203 Terminal terminal(
204 .clk(clk),
205 .cp_req(cp_req), .cp_insn(cp_insn), .cp_ack(cp_ack_terminal), .cp_busy(cp_busy_terminal), .cp_rnw(cp_rnw),
206 .cp_read(cp_read_terminal), .cp_write(cp_write));
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207
208 Writeback writeback(
209 .clk(clk),
210 .inbubble(bubble_out_memory),
211 .write_reg(memory_out_write_reg), .write_num(memory_out_write_num), .write_data(memory_out_write_data),
fdecc897 212 .cpsr(memory_out_cpsr), .spsr(memory_out_spsr), .cpsrup(memory_out_cpsrup),
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213 .regfile_write(regfile_write), .regfile_write_reg(regfile_write_reg), .regfile_write_data(regfile_write_data),
214 .outcpsr(writeback_out_cpsr), .outspsr(writeback_out_spsr),
215 .jmp(jmp_out_writeback), .jmppc(jmppc_out_writeback));
216 assign writeback_out_backflush = jmp_out_writeback;
149bcd1a 217
ff39dfc7 218 reg [31:0] clockno = 0;
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219 always @(posedge clk)
220 begin
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221 clockno <= clockno + 1;
222 $display("------------------------------------------------------------------------------");
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223 $display("%3d: FETCH: Bubble: %d, Instruction: %08x, PC: %08x", clockno, bubble_out_fetch, insn_out_fetch, pc_out_fetch);
224 $display("%3d: ISSUE: Stall: %d, Bubble: %d, Instruction: %08x, PC: %08x", clockno, stall_cause_issue, bubble_out_issue, insn_out_issue, pc_out_issue);
db2351c4 225 $display("%3d: DECODE: op0 %08x, op1 %08x, op2 %08x, carry %d", clockno, decode_out_op0, decode_out_op1, decode_out_op2, decode_out_carry);
3550fbf2 226 $display("%3d: EXEC: Stall: %d, Bubble: %d, Instruction: %08x, PC: %08x, Reg: %d, [%08x -> %d], Jmp: %d [%08x]", clockno, stall_cause_execute, bubble_out_execute, insn_out_execute, pc_out_execute, execute_out_write_reg, execute_out_write_data, execute_out_write_num, jmp_out_execute, jmppc_out_execute);
c65110a8 227 $display("%3d: MEMORY: Stall: %d, Bubble: %d, Instruction: %08x, PC: %08x, Reg: %d, [%08x -> %d]", clockno, stall_cause_memory, bubble_out_memory, insn_out_memory, pc_out_memory, memory_out_write_reg, memory_out_write_data, memory_out_write_num);
ab7ee9fc 228 $display("%3d: WRITEB: CPSR %08x, SPSR %08x, Reg: %d [%08x -> %d], Jmp: %d [%08x]", clockno, writeback_out_cpsr, writeback_out_spsr, regfile_write, regfile_write_data, regfile_write_reg, jmp_out_writeback, jmppc_out_writeback);
90ff449a 229 end
ee406839 230endmodule
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