system.v
[firearm.git] / system.v
CommitLineData
ee406839
JW
1`define BUS_ICACHE 0
2
3module System();
4 wire [7:0] bus_req;
5 wire [7:0] bus_ack;
6 wire [31:0] bus_addr;
7 wire [31:0] bus_data;
8 wire bus_rd, bus_wr;
9 wire bus_ready;
10
11 wire bus_req_icache = bus_req[`BUS_ICACHE];
12 wire bus_ack_icache = bus_ack[`BUS_ICACHE];
13 wire [31:0] bus_addr_icache;
14 wire [31:0] bus_wdata_icache;
15 wire bus_rd_icache;
16 wire bus_wr_icache;
17
18 assign bus_addr = bus_addr_icache;
19 assign bus_data = bus_wdata_icache;
20 assign bus_rd = bus_rd_icache;
21 assign bus_wr = bus_wr_icache;
22
23 BusArbiter busarbiter(.bus_req(bus_req), .bus_ack(bus_ack));
24 ICache(
25 .rd_addr(), .rd_req(), .rd_wait(), .rd_data(),
26 .bus_req(bus_req_icache), .bus_ack(bus_ack_icache),
27 .bus_addr(bus_addr_icache), .bus_rdata(bus_data),
28 .bus_wdata(bus_wdata_icache), .bus_rd(bus_rd_icache),
29 .bus_wr(bus_wr_icache), .bus_ready(bus_ready));
30endmodule
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