Dual bus processor
[fpgaboy.git] / GBZ80Core.v
2008-05-04 Joshua WiseDual bus processor
2008-05-03 Joshua WiseAdd some verilator and isim compatibility
2008-04-28 Joshua WiseFix insn_bit. HOLY SHIT THE BOOT ROM WORKS c.c
2008-04-19 Joshua WiseAdd bit instruction
2008-04-19 Joshua WiseAdd ld (bc/de),a, ld a,(bc/de)
2008-04-14 Joshua WiseSome LCDC IRQ stuffs. Working on fixing ldm_a
2008-04-13 Joshua WiseAdd DI/EI delay test. Add LD M, A.
2008-04-08 Joshua WiseINC -> INCDEC
2008-04-07 Joshua WiseALU8IMM
2008-04-06 Joshua WisePUSH bugfix
2008-04-06 Joshua WiseRework it all to use the new macros.
2008-04-06 Joshua WiseCleanups to make code nicer looking. ALU subtraction...
2008-04-06 Joshua WiseFinish splitting out functions.
2008-04-06 Joshua WiseSplit out more insns
2008-04-06 Joshua WiseClean up some warnings.
2008-04-06 Joshua WiseStart refactoring instructions.
2008-04-06 Joshua WiseBugfix for SCF
2008-04-06 Joshua WiseSome reworks to prepare for transition to makefile...
2008-04-05 Joshua WiseCut 1 at interrupt support for CPU
2008-04-04 Joshua WiseTimer works.
2008-04-04 Joshua WiseAdd inc16 test, and inc16 and dec16.
2008-04-04 Joshua WiseYay. Fix retcc. Comparing against an x value - great...
2008-04-04 Joshua WiseRETCC that breaks everything. Why?
2008-04-04 Joshua WiseJR and JRCC
2008-04-04 Joshua WiseAdd JP HL, add CALL CC
2008-04-03 Joshua WiseAdd an instruction tester to the test ROM.
2008-04-01 Joshua WiseFix not-taken jumps. Add more ALU ops. Add ALU A ops.
2008-04-01 Joshua WiseJP
2008-04-01 Joshua WiseSpit lots of A out of the UART.
2008-04-01 Joshua WiseGet it running on the board.
2008-03-31 Joshua WiseFix RAM bugs with kludge. Fix CALL bug. CALL test case.
2008-03-31 Joshua WiseAdd CALL (untested) and ROM and internal RAM
2008-03-31 Joshua WiseFix part of the indentation tragedy.
2008-03-31 Joshua WiseAdd RET/IRET. Fix a bug in RST where the PC pushed...
2008-03-31 Joshua WiseRST insn
2008-03-30 Joshua WiseNOP, and bug fixes
2008-03-30 Joshua WiseADC, AND, OR, XOR
2008-03-30 Joshua WiseOur first ALU operation -- ADD
2008-03-30 Joshua WiseLD{D,I} A,(HL) and LD{D,I} (HL),A
2008-03-30 Joshua WiseLDH A,(C) and LDH (C), A
2008-03-29 Joshua WiseMake it synthesizable.
2008-03-29 Joshua WisePUSH and POP work
2008-03-29 Joshua WiseLD reg, imm16 and LD SP,HL
2008-03-29 Joshua WiseLD with HLs
2008-03-29 Joshua WiseLD reg, reg
2008-03-29 Joshua WiseInitial
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