| 2008-04-06 |
Joshua Wise | Start refactoring instructions. |
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| 2008-04-06 |
Joshua Wise | Bugfix for SCF |
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| 2008-04-06 |
Joshua Wise | Some reworks to prepare for transition to makefile... |
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| 2008-04-05 |
Joshua Wise | Test interrupts. They work! |
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| 2008-04-05 |
Joshua Wise | Cut 1 at interrupt support for CPU |
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| 2008-04-04 |
Joshua Wise | Poke the LEDs. YOUR MOM WAS TOO WIDE |
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| 2008-04-04 |
Joshua Wise | Timer works. |
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| 2008-04-04 |
Joshua Wise | First cut at timer |
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| 2008-04-04 |
Joshua Wise | Add inc16 test, and inc16 and dec16. |
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| 2008-04-04 |
Joshua Wise | Yay. Fix retcc. Comparing against an x value - great... |
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| 2008-04-04 |
Joshua Wise | RETCC that breaks everything. Why? |
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| 2008-04-04 |
Joshua Wise | Update the 7seg more often. |
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| 2008-04-04 |
Joshua Wise | Convert the test to use jr |
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| 2008-04-04 |
Joshua Wise | JR and JRCC |
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| 2008-04-04 |
Joshua Wise | Add JP HL, add CALL CC |
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| 2008-04-03 |
Joshua Wise | Add an instruction tester to the test ROM. |
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| 2008-04-03 |
Joshua Wise | Fuck shell scripts, we use makefiles here |
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| 2008-04-03 |
Joshua Wise | Update perms on buildrom.sh. |
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| 2008-04-03 |
Joshua Wise | Add buildrom.sh. Add some comments of note in System.v. |
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| 2008-04-02 |
Joshua Wise | Tweak the sign on a bit |
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| 2008-04-02 |
Joshua Wise | Add a ROM, and go up to 8k of RAM |
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| 2008-04-02 |
Joshua Wise | Working RAM :D |
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| 2008-04-02 |
Joshua Wise | Add files, and add a freezeswitch to debug this issue... |
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| 2008-04-02 |
Joshua Wise | Fix bug in UART where idle state is not entered by... |
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| 2008-04-01 |
Joshua Wise | Hello, Z80! |
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| 2008-04-01 |
Joshua Wise | Hello, Z80! |
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| 2008-04-01 |
Joshua Wise | Test RAM |
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| 2008-04-01 |
Joshua Wise | Poke the UART with a stick. ABABABABABABAB |
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| 2008-04-01 |
Joshua Wise | Fix not-taken jumps. Add more ALU ops. Add ALU A ops. |
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| 2008-04-01 |
Joshua Wise | Test JP and JP cc |
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| 2008-04-01 |
Joshua Wise | JP |
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| 2008-04-01 |
Joshua Wise | Spit lots of A out of the UART. |
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| 2008-04-01 |
Joshua Wise | Get it running on the board. |
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| 2008-03-31 |
Joshua Wise | HALP ABOUT TO BLOW AWY PROJECT |
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| 2008-03-31 |
Joshua Wise | Fix RAM bugs with kludge. Fix CALL bug. CALL test case. |
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| 2008-03-31 |
Joshua Wise | Add CALL (untested) and ROM and internal RAM |
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| 2008-03-31 |
Joshua Wise | Fix part of the indentation tragedy. |
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| 2008-03-31 |
Joshua Wise | Add RET/IRET. Fix a bug in RST where the PC pushed... |
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| 2008-03-31 |
Joshua Wise | RST insn |
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| 2008-03-30 |
Joshua Wise | NOP, and bug fixes |
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| 2008-03-30 |
Joshua Wise | Test XOR |
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| 2008-03-30 |
Joshua Wise | ADC, AND, OR, XOR |
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| 2008-03-30 |
Joshua Wise | Our first ALU operation -- ADD |
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| 2008-03-30 |
Joshua Wise | LD{D,I} A,(HL) and LD{D,I} (HL),A |
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| 2008-03-30 |
Joshua Wise | LDH A,(C) and LDH (C), A |
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| 2008-03-29 |
Joshua Wise | Add UCF for the z80 core |
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| 2008-03-29 |
Joshua Wise | update ISE project |
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| 2008-03-29 |
Joshua Wise | Make it synthesizable. |
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| 2008-03-29 |
Joshua Wise | PUSH and POP work |
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| 2008-03-29 |
Joshua Wise | LD reg, imm16 and LD SP,HL |
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| 2008-03-29 |
Joshua Wise | LD with HLs |
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| 2008-03-29 |
Joshua Wise | LD reg, reg |
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| 2008-03-29 |
Joshua Wise | Initial |
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git.joshuawise.com / fpgaboy.git / shortlog