]> Joshua Wise's Git repositories - netwatch.git/blob - ich2/smram-ich2.c
Enable caching while in SMM.
[netwatch.git] / ich2 / smram-ich2.c
1 #include "reg-82815.h"
2 #include <pci.h>
3 #include <smram.h>
4
5 static unsigned long memsz[] = {
6         0,                      // 0
7         32*1024*1024,           // 1
8         32*1024*1024,           // 2
9         48*1024*1024,           // 3
10         64*1024*1024,           // 4
11         64*1024*1024,           // 5
12         96*1024*1024,           // 6
13         128*1024*1024,          // 7
14         128*1024*1024,          // 8
15         128*1024*1024,          // 9
16         128*1024*1024,          // A
17         192*1024*1024,          // B
18         256*1024*1024,          // C
19         256*1024*1024,          // D
20         256*1024*1024,          // E
21         512*1024*1024           // F
22 };
23
24 unsigned int smram_tseg_length(void) {
25         unsigned char smramc;
26         int usmm;
27
28         smramc = pci_read8(0, 0, 0, SMRAMC);
29
30         usmm = (smramc >> 4) & 0x3;
31
32         switch (usmm)
33         {
34         case 0:
35                 return 0;
36         case 1:
37                 return 0;
38         case 2:
39                 return 512 * 1024;
40         case 3:
41                 return 1024 * 1024;
42         }
43         return 0;
44 }
45         
46 void * smram_tseg_start(void) {
47         unsigned char drp, drp2;
48         unsigned int tom = 0;
49
50         drp = pci_read8(0, 0, 0, DRP);
51         drp2 = pci_read8(0, 0, 0, DRP2);
52
53         tom += memsz[drp & 0xF];
54         tom += memsz[drp >> 4];
55         tom += memsz[drp2 & 0xF];
56
57         return (void *)(tom - smram_tseg_length());
58 }
59
60 #ifndef __RAW__
61
62 void smram_aseg_dump(void) {
63
64         unsigned char smramc, drp, drp2;
65         unsigned int tom = 0;
66         int usmm, lsmm;
67
68         smramc = pci_read8(0, 0, 0, SMRAMC);
69         drp = pci_read8(0, 0, 0, DRP);
70         drp2 = pci_read8(0, 0, 0, DRP2);
71
72         printf("SMRAMC: %02x\n", smramc);
73
74         tom += memsz[drp & 0xF];
75         tom += memsz[drp >> 4];
76         tom += memsz[drp2 & 0xF];
77         
78         printf("Top of DRAM: %08x\n", tom);
79         
80         usmm = (smramc >> 4) & 0x3;
81         lsmm = (smramc >> 2) & 0x3;
82         
83         switch (usmm)
84         {
85         case 0:
86                 printf("TSEG and HSEG both off\n");
87                 break;
88         case 1:
89                 printf("TSEG off, HSEG %s\n", lsmm ? "off" : "on");
90                 break;
91         case 2:
92                 printf("TSEG 512KB (%08x - %08x), HSEG %s\n",
93                         tom - 512 * 1024, tom - 1, lsmm ? "off" : "on");
94                 break;
95         case 3:
96                 printf("TSEG 1MB (%08x - %08x), HSEG %s\n",
97                         tom - 1 * 1024 * 1024, tom - 1, lsmm ? "off" : "on");
98                 break;
99         }
100         
101         switch (lsmm)
102         {
103         case 0:
104                 printf("ABSEG disabled\n");
105                 break;
106         case 1:
107                 printf("ABSEG enabled as system RAM\n");
108                 break;
109         case 2:
110                 printf("ABSEG enabled for SMM code only\n");
111                 break;
112         case 3:
113                 printf("ABSEG enabled for both SMM code and data\n");
114                 break;
115         }
116 }
117 #endif
118
119 int smram_locked()
120 {
121         unsigned char smramc = pci_read8(0, 0, 0, SMRAMC);
122         
123         return (smramc & SMRAMC_LOCK) ? 1 : 0;
124 }
125
126 smram_state_t smram_save_state()
127 {
128         return pci_read8(0, 0, 0, SMRAMC);
129 }
130
131 void smram_restore_state(smram_state_t state)
132 {
133         pci_write8(0, 0, 0, SMRAMC, state); 
134 }
135
136 int smram_aseg_set_state (int open) {
137         unsigned char smramc;
138
139         if (smram_locked())
140                 return -1;
141                 
142         smramc = pci_read8(0, 0, 0, SMRAMC);
143
144         switch (open)
145         {
146         case SMRAM_ASEG_CLOSED:
147                 smramc = (smramc & 0xF0) | 0x00;
148                 break;
149         case SMRAM_ASEG_OPEN:
150                 smramc = (smramc & 0xF0) | 0x04;
151                 break;
152         case SMRAM_ASEG_SMMCODE:
153                 smramc = (smramc & 0xF0) | 0x08;
154                 break;
155         case SMRAM_ASEG_SMMONLY:
156                 smramc = (smramc & 0xF0) | 0x0C;
157                 break;
158         default:
159                 return -1;
160         }
161
162         pci_write8(0, 0, 0, SMRAMC, smramc);
163
164         return 0;
165 }
166
167 int smram_tseg_set_state (int open) {
168         unsigned char smramc;
169
170         if (smram_locked())
171                 return -1;
172                 
173         smramc = pci_read8(0, 0, 0, SMRAMC);
174
175         switch (open)
176         {
177         case SMRAM_TSEG_OPEN:
178                 smramc = (smramc & 0x8F) | 0x00;
179                 break;
180         default:
181                 return -1;
182         }
183
184         pci_write8(0, 0, 0, SMRAMC, smramc);
185
186         return 0;
187 }
This page took 0.039946 seconds and 4 git commands to generate.