]> Joshua Wise's Git repositories - netwatch.git/commitdiff
Enable caching while in SMM.
authorJoshua Wise <joshua@nyus.joshuawise.com>
Sat, 6 Dec 2008 13:56:14 +0000 (08:56 -0500)
committerJoshua Wise <joshua@nyus.joshuawise.com>
Sat, 6 Dec 2008 13:56:14 +0000 (08:56 -0500)
aseg-paging/smi.c
include/msr.h [new file with mode: 0644]

index 7f75a8539e1acf849d163fba5f8736aac3e14ff4..d519341a9370446fdbe8e1e65e56419271f4abb4 100644 (file)
@@ -7,6 +7,7 @@
 #include <serial.h>
 #include <fb.h>
 #include <output.h>
+#include <msr.h>
 #include "../net/net.h"
 #include "vga-overlay.h"
 
@@ -18,6 +19,9 @@ void smi_entry(void)
 {
        char statstr[512];
 
+       /* Reenable caching on SMRAM. */
+       WRMSR(0x202, (RDMSR(0x202) & ~(0xFFULL)) | 0x06ULL);
+
        pcisave = inl(0xCF8);
        vgasave = inb(0x3D4);
        pci_unbother_all();
@@ -51,6 +55,9 @@ void smi_entry(void)
        pci_bother_all();
        outl(0xCF8, pcisave);
        outb(0x3D4, vgasave);
+       
+       /* Disable caching on SMRAM again, to prevent the user from whacking us. */
+       WRMSR(0x202, RDMSR(0x202) & ~(0xFFULL));
 }
 
 extern void timer_handler(smi_event_t ev);
diff --git a/include/msr.h b/include/msr.h
new file mode 100644 (file)
index 0000000..0bed091
--- /dev/null
@@ -0,0 +1,18 @@
+#ifndef _MSR_H
+#define _MSR_H
+
+#define WRMSR(ad, da) \
+       do { \
+               unsigned long __a = (ad); \
+               unsigned long long __d = (da); \
+               asm volatile("wrmsr" : : "c" (__a), "A" (__d)); \
+       } while (0)
+#define RDMSR(ad) \
+       ({ \
+               unsigned long __a = (ad); \
+               unsigned long long __d; \
+               asm volatile("rdmsr" : "=A" (__d) : "c" (__a)); \
+               __d; \
+       })
+
+#endif
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