Ok, it work.
authorJoshua Wise <joshua@rebirth.joshuawise.com>
Mon, 5 Jan 2009 10:26:19 +0000 (05:26 -0500)
committerJoshua Wise <joshua@rebirth.joshuawise.com>
Mon, 5 Jan 2009 10:26:19 +0000 (05:26 -0500)
Execute.v
Issue.v
ram.comments.hex
ram.hex
system.v

index 4e3f44f..8a7d8f6 100644 (file)
--- a/Execute.v
+++ b/Execute.v
@@ -163,12 +163,12 @@ module Execute(
                begin end
                `DECODE_BRANCH:
                begin
-                       if(!prevstall && !inbubble) begin
+                       if(!inbubble) begin
                                jmppc = pc + op0 + 32'h8;
                                if(insn[24]) begin
                                        next_write_reg = 1;
                                        next_write_num = 4'hE; /* link register */
-                                       next_write_data = pc + 32'h4;
+                                       next_write_data = pc - 32'h4;
                                end
                                jmp = 1'b1;
                        end
@@ -236,8 +236,8 @@ module ALU(
        output reg [31:0] cpsr_out,
        output reg setres
 );
-       wire [31:0] res;
-       wire flag_n, flag_z, flag_c, flag_v, setres;
+       reg [31:0] res;
+       reg flag_n, flag_z, flag_c, flag_v;
        wire [32:0] sum, diff, rdiff;
        wire sum_v, diff_v, rdiff_v;
 
diff --git a/Issue.v b/Issue.v
index a6b7109..7b281a3 100644 (file)
--- a/Issue.v
+++ b/Issue.v
@@ -282,7 +282,7 @@ module Issue(
                waiting_cpsr = use_cpsr & (cpsr_inflight[0] | cpsr_inflight[1]);
                waiting_regs = |(use_regs & (regs_inflight[0] | regs_inflight[1]));
                
-               outstall = (waiting && !inbubble) || stall;     /* Happens in an always @*, because it is an exception. */
+               outstall = ((waiting && !inbubble) || stall) && !flush; /* Happens in an always @*, because it is an exception. */
        end
        
        /* Actually do the issue. */
index bffc93b..b1fa950 100644 (file)
@@ -26,9 +26,9 @@ E180F081
 E180F081
 E180F081
 EA000000 // jump forward
-EBFFFFFF // whirrr, skipped the first time
+EAFFFFFE // whirrr, skipped the first time
 E1A00000 // nop
-EBFFFFFD // jump back
+EBFFFFFC // jump back
 E0000000
 E0000000
 E0000000
diff --git a/ram.hex b/ram.hex
index 9f19cbb..1a068cc 100644 (file)
--- a/ram.hex
+++ b/ram.hex
@@ -21,9 +21,9 @@ E180F081
 E180F081
 E180F081
 EA000000
-EBFFFFFF
+EAFFFFFE
 E1A00000
-EAFFFFFD
+EBFFFFFC
 E0000000
 E0000000
 E0000000
index f80f327..4601ae7 100644 (file)
--- a/system.v
+++ b/system.v
@@ -54,9 +54,7 @@ module System(input clk);
        wire [31:0] pc_out_fetch;
        wire [31:0] pc_out_issue;
 
-       wire execute_outflush = jmp;
-       wire issue_flush = execute_outflush;
-       wire execute_flush = 1'b0;
+       wire execute_out_backflush;
 
        BusArbiter busarbiter(.bus_req(bus_req), .bus_ack(bus_ack));
 
@@ -88,7 +86,7 @@ module System(input clk);
        Issue issue(
                .clk(clk),
                .Nrst(1'b1 /* XXX */),
-               .stall(stall_cause_execute), .flush(issue_flush),
+               .stall(stall_cause_execute), .flush(execute_out_backflush),
                .inbubble(bubble_out_fetch), .insn(insn_out_fetch),
                .inpc(pc_out_fetch), .cpsr(32'b0 /* XXX */),
                .outstall(stall_cause_issue), .outbubble(bubble_out_issue),
@@ -110,7 +108,7 @@ module System(input clk);
        
        Execute execute(
                .clk(clk), .Nrst(1'b0),
-               .stall(1'b0 /* XXX */), .flush(execute_flush),
+               .stall(1'b0 /* XXX */), .flush(1'b0),
                .inbubble(bubble_out_issue), .pc(pc_out_issue), .insn(insn_out_issue),
                .cpsr(32'b0 /* XXX */), .spsr(decode_out_spsr), .op0(decode_out_op0), .op1(decode_out_op1),
                .op2(decode_out_op2), .carry(decode_out_carry),
@@ -119,6 +117,7 @@ module System(input clk);
                .write_data(execute_out_write_data),
                .jmppc(jmppc),
                .jmp(jmp));
+       assign execute_out_backflush = jmp;
 
        reg [31:0] clockno = 0;
        always @(posedge clk)
This page took 0.024767 seconds and 4 git commands to generate.