initial commit

[poslink.git] / POSLink.v

module POSLink(
	input xtal,
	input [2:0] tos_inputs_e2,
	input [3:0] sw,
	output reg [3:0] leds,
	output reg tos_output);
	
	reg [2:0] tos_inputs_e;
	reg [2:0] tos_inputs;
	wire [2:0] tos_good;
	
	always @(posedge xtal) begin
		tos_inputs_e <= tos_inputs_e2;
		tos_inputs <= tos_inputs_e;
	end
	
	/* 100ns -> 1000ns */
	
	always @(*) begin
		leds[3:0] = 4'h0;
		
		if (sw[2] || (tos_good[2] && ~sw[1] && ~sw[0])) begin
			tos_output = tos_inputs[2];
			leds[2] = 1;
		end else if (sw[1] | (tos_good[1] && ~sw[0])) begin
			tos_output = tos_inputs[1];
			leds[1] = 1;
		end else if (sw[0] | tos_good[0]) begin
			tos_output = tos_inputs[0];
			leds[0] = 1;
		end else
			tos_output = sw[3];
		leds[3] = tos_output;
	end
	
	TOS_Detect detect[2:0](.xtal(xtal), .tos_input(tos_inputs), .tos_good(tos_good));
endmodule

/* xtal: 50MHz (==20ns)
 * Minimum: 100ns (we'll allow 60ns for good measure)
 *          5 cycles (we'll allow 3 for good measure)
 * Maximum: 1000ns (we'll allow 1200ns for good measure)
 *          50 cycles (we'll allow 60 for good measure)
 */
module TOS_Detect(
	input xtal,
	input tos_input,
	output reg tos_good = 0);
	
	reg tos_input_1a = 0;
	always @(posedge xtal)
		tos_input_1a <= tos_input;
	wire transition = tos_input ^ tos_input_1a;
	
	reg [5:0] lasttx = 0;
	always @(posedge xtal) begin
		if (transition) begin
			if (lasttx < 3) /* Too soon! */
				tos_good <= 0;
			else if (lasttx > 60) /* Too late! */
				tos_good <= 0;
			else /* OK by me. */
				tos_good <= 1;
			lasttx <= 0;
		end else begin
			if (lasttx != 63)
				lasttx <= lasttx + 1;
			else
				tos_good <= 0;
		end
	end
endmodule