/*
- * 3c90x.c -- This file implements the 3c90x driver for etherboot. Written
- * by Greg Beeley, Greg.Beeley@LightSys.org. Modified by Steve Smith,
- * Steve.Smith@Juno.Com. Alignment bug fix Neil Newell (nn@icenoir.net).
+ * 3c90x.c
+ * NetWatch
*
- * This program Copyright (C) 1999 LightSys Technology Services, Inc.
- * Portions Copyright (C) 1999 Steve Smith
+ * A ring buffer-based, bus-mastering Ethernet driver.
+ *
+ * Derived from Etherboot's 3c90x.c, which is
+ * Copyright (C) 1999 LightSys Technology Services, Inc.
+ * Portions Copyright (C) 1999 Steve Smith
*
* This program may be re-distributed in source or binary form, modified,
* sold, or copied for any purpose, provided that the above copyright message
* PURPOSE or MERCHANTABILITY. Please read the associated documentation
* "3c90x.txt" before compiling and using this driver.
*
- * --------
- *
- * Program written with the assistance of the 3com documentation for
- * the 3c905B-TX card, as well as with some assistance from the 3c59x
- * driver Donald Becker wrote for the Linux kernel, and with some assistance
- * from the remainder of the Etherboot distribution.
- *
* REVISION HISTORY:
*
* v0.10 1-26-1998 GRB Initial implementation.
* Re-wrote poll and transmit for
* better error recovery and heavy
* network traffic operation
- * v2.01 5-26-2003 NN Fixed driver alignment issue which
- * caused system lockups if driver structures
- * not 8-byte aligned.
+ * v2.01 5-26-2003 NN Fixed driver alignment issue which
+ * caused system lockups if driver structures
+ * not 8-byte aligned.
+ * NetWatch0 12-07-2008 JAW Taken out back and shot.
*
*/
#include <paging.h>
#define XCVR_MAGIC (0x5A00)
-/** any single transmission fails after 16 collisions or other errors
- ** this is the number of times to retry the transmission -- this should
- ** be plenty
- **/
-#define XMIT_RETRIES 5
/*** Register definitions for the 3c905 ***/
enum Registers
#define INT_CMDINPROGRESS (1<<12)
#define INT_WINDOWNUMBER (7<<13)
+/* These structures are all 64-bit aligned, as needed for bus-mastering I/O. */
+typedef struct {
+ unsigned int addr;
+ unsigned int len;
+} segment_t __attribute__ ((aligned(8)));
-/*** TX descriptor ***/
-typedef struct
- {
- unsigned int DnNextPtr;
- unsigned int FrameStartHeader;
- unsigned int HdrAddr;
- unsigned int HdrLength;
- unsigned int DataAddr;
- unsigned int DataLength;
- }
- TXD __attribute__ ((aligned(8))); /* 64-bit aligned for bus mastering */
+typedef struct {
+ unsigned int next;
+ unsigned int hdr;
+ segment_t segments[64 /* XXX magic */];
+} txdesc_t __attribute__ ((aligned(8)));
/*** RX descriptor ***/
-typedef struct
- {
- unsigned int UpNextPtr;
- unsigned int UpPktStatus;
- unsigned int DataAddr;
- unsigned int DataLength;
- }
- RXD __attribute__ ((aligned(8))); /* 64-bit aligned for bus mastering */
+typedef struct {
+ unsigned int next;
+ unsigned int status;
+ segment_t segments[64];
+} rxdesc_t __attribute__ ((aligned(8)));
/*** Global variables ***/
static struct
unsigned char CurrentWindow;
unsigned int IOAddr;
unsigned char HWAddr[ETH_ALEN];
- TXD TransmitDPD;
- RXD ReceiveUPD;
}
INF_3C90X;
+
static struct nic nic;
#define _outl(v,a) outl((a),(v))
}
-#ifdef CFG_3C90X_BOOTROM_FIX
-/*** a3c90x_internal_WriteEepromWord - write a physical word of
- *** data to the onboard serial eeprom (not the BIOS prom, but the
- *** nvram in the card that stores, among other things, the MAC
- *** address).
- ***/
-static int
-a3c90x_internal_WriteEepromWord(int ioaddr, int address, unsigned short value)
- {
- /** Select register window **/
- _set_window(ioaddr, winEepromBios0);
-
- /** Verify Eeprom not busy **/
- while((1<<15) & inw(ioaddr + regEepromCommand_0_w));
-
- /** Issue WriteEnable, and wait for completion. **/
- _outw(0x30, ioaddr + regEepromCommand_0_w);
- while((1<<15) & inw(ioaddr + regEepromCommand_0_w));
-
- /** Issue EraseRegister, and wait for completion. **/
- _outw(address + ((0x03)<<6), ioaddr + regEepromCommand_0_w);
- while((1<<15) & inw(ioaddr + regEepromCommand_0_w));
-
- /** Send the new data to the eeprom, and wait for completion. **/
- _outw(value, ioaddr + regEepromData_0_w);
- _outw(0x30, ioaddr + regEepromCommand_0_w);
- while((1<<15) & inw(ioaddr + regEepromCommand_0_w));
-
- /** Burn the new data into the eeprom, and wait for completion. **/
- _outw(address + ((0x01)<<6), ioaddr + regEepromCommand_0_w);
- while((1<<15) & inw(ioaddr + regEepromCommand_0_w));
-
- return 0;
- }
-#endif
-
-#ifdef CFG_3C90X_BOOTROM_FIX
-/*** a3c90x_internal_WriteEeprom - write data to the serial eeprom,
- *** and re-compute the eeprom checksum.
- ***/
-static int
-a3c90x_internal_WriteEeprom(int ioaddr, int address, unsigned short value)
- {
- int cksum = 0,v;
- int i;
- int maxAddress, cksumAddress;
-
- if (INF_3C90X.isBrev)
- {
- maxAddress=0x1f;
- cksumAddress=0x20;
- }
- else
- {
- maxAddress=0x16;
- cksumAddress=0x17;
- }
-
- /** Write the value. **/
- if (a3c90x_internal_WriteEepromWord(ioaddr, address, value) == -1)
- return -1;
-
- /** Recompute the checksum. **/
- for(i=0;i<=maxAddress;i++)
- {
- v = a3c90x_internal_ReadEeprom(ioaddr, i);
- cksum ^= (v & 0xFF);
- cksum ^= ((v>>8) & 0xFF);
- }
- /** Write the checksum to the location in the eeprom **/
- if (a3c90x_internal_WriteEepromWord(ioaddr, cksumAddress, cksum) == -1)
- return -1;
-
- return 0;
- }
-#endif
-
/*** a3c90x_reset: exported function that resets the card to its default
*** state. This is so the Linux driver can re-set the card up the way
*** it wants to. If CFG_3C90X_PRESERVE_XCVR is defined, then the reset will
***/
static void a3c90x_reset(void)
{
-#ifdef CFG_3C90X_PRESERVE_XCVR
- int cfg;
- /** Read the current InternalConfig value. **/
- _set_window(INF_3C90X.IOAddr, winTxRxOptions3);
- cfg = inl(INF_3C90X.IOAddr + regInternalConfig_3_l);
-#endif
-
/** Send the reset command to the card **/
outputf("3c90x: issuing RESET");
_issue_command(INF_3C90X.IOAddr, cmdGlobalReset, 0);
_outw(0, INF_3C90X.IOAddr + regStationMask_2_3w+2);
_outw(0, INF_3C90X.IOAddr + regStationMask_2_3w+4);
-#ifdef CFG_3C90X_PRESERVE_XCVR
- /** Re-set the original InternalConfig value from before reset **/
- _set_window(INF_3C90X.IOAddr, winTxRxOptions3);
- _outl(cfg, INF_3C90X.IOAddr + regInternalConfig_3_l);
-
- /** enable DC converter for 10-Base-T **/
- if ((cfg&0x0300) == 0x0300)
- {
- _issue_command(INF_3C90X.IOAddr, cmdEnableDcConverter, 0);
- }
-#endif
-
/** Issue transmit reset, wait for command completion **/
_issue_command(INF_3C90X.IOAddr, cmdTxReset, 0);
if (! INF_3C90X.isBrev)
return;
}
+/***************************** Transmit routines *****************************/
+#define XMIT_BUFS 8
-/*** a3c90x_transmit: exported function that transmits a packet. Does not
- *** return any particular status. Parameters are:
- *** dest_addr[6] - destination address, ethernet;
- *** proto - protocol type (ARP, IP, etc);
- *** size - size of the non-header part of the packet that needs transmitted;
- *** pkt - the pointer to the packet data itself.
- ***/
-static void
-a3c90x_transmit(const char *dest_addr, unsigned int proto,
- unsigned int size, const char *pkt)
+static txdesc_t txdescs[XMIT_BUFS];
+static struct pbuf *txpbufs[XMIT_BUFS] = {0,};
+
+/* txcons is the index into the ring buffer of the last packet that the
+ * 3c90x was seen processing, or -1 if the 3c90x was idle.
+ */
+static int txcons = -1;
+
+/* txprod is the index of the _next_ buffer that the driver will write into. */
+static int txprod = 0;
+
+/* _transmit adds a packet to the transmit ring buffer. If no space is
+ * available in the buffer, then _transmit blocks until a packet has been
+ * transmitted.
+ */
+static void _transmit(struct pbuf *p)
{
- struct eth_hdr
+ unsigned char status;
+ int len, n;
+
+ /* Wait for there to be space. */
+ if (txcons == txprod)
{
- unsigned char dst_addr[ETH_ALEN];
- unsigned char src_addr[ETH_ALEN];
- unsigned short type;
- } hdr;
+ int i = 0;
- unsigned char status;
- unsigned int i, retries;
-
- for (retries=0; retries < XMIT_RETRIES; retries++)
+ outputf("3c90x: txbuf full, waiting for space...");
+ while (inl(INF_3C90X.IOAddr + regDnListPtr_l) != 0)
+ i++;
+ outputf("3c90x: took %d iters", i);
+ }
+
+ /* Stall the download engine so it doesn't bother us. */
+ _issue_command(INF_3C90X.IOAddr, cmdStallCtl, 2 /* Stall download */);
+
+ /* Clean up old txcons. */
+ if (txcons != -1)
{
- if (retries != 0)
- outputf("3c90x: retrying packet send (%d)", retries);
+ unsigned long curp = inl(INF_3C90X.IOAddr + regDnListPtr_l);
+ int end;
- _issue_command(INF_3C90X.IOAddr, cmdStallCtl, 2 /* Stall download */);
-
- hdr.type = htons(proto);
- memcpy(hdr.dst_addr, dest_addr, ETH_ALEN);
- memcpy(hdr.src_addr, INF_3C90X.HWAddr, ETH_ALEN);
-
- /** Setup the DPD (download descriptor) **/
- INF_3C90X.TransmitDPD.DnNextPtr = 0;
- /** set notification for transmission completion (bit 15) **/
- INF_3C90X.TransmitDPD.FrameStartHeader = (size + sizeof(hdr)) | 0x8000;
- INF_3C90X.TransmitDPD.HdrAddr = virt_to_bus(&hdr);
- INF_3C90X.TransmitDPD.HdrLength = sizeof(hdr);
- INF_3C90X.TransmitDPD.DataAddr = virt_to_bus(pkt);
- INF_3C90X.TransmitDPD.DataLength = size + (1<<31);
-
- /** Send the packet **/
- outl(INF_3C90X.IOAddr + regDnListPtr_l, virt_to_bus(&(INF_3C90X.TransmitDPD)));
- _issue_command(INF_3C90X.IOAddr, cmdStallCtl, 3 /* Unstall download */);
+ if (curp == 0)
+ end = txprod;
+ else
+ end = (curp - v2p(txdescs)) / sizeof(txdescs[0]);
- oneshot_start_ms(100);
- while((inl(INF_3C90X.IOAddr + regDnListPtr_l) != 0) && oneshot_running())
- ;
- if (!oneshot_running())
- outputf("3c90x: Download engine pointer timeout");
-
- oneshot_start_ms(10); /* Give it 10 ms */
- while (!(inw(INF_3C90X.IOAddr + regCommandIntStatus_w) & INT_TXCOMPLETE) && oneshot_running())
- ;
-
- if (!(inw(INF_3C90X.IOAddr + regCommandIntStatus_w) & INT_TXCOMPLETE))
+ while (txcons != end)
{
- outputf("3c90x: tx timeout? txstat %02x", inb(INF_3C90X.IOAddr + regTxStatus_b));
- outputf("3c90x: Gen sts %04x", inw(INF_3C90X.IOAddr + regCommandIntStatus_w));
- continue;
+ pbuf_free(txpbufs[txcons]);
+ txpbufs[txcons] = NULL;
+ txdescs[txcons].hdr = 0;
+ txdescs[txcons].next = 0;
+ txcons = (txcons + 1) % XMIT_BUFS;
}
- status = inb(INF_3C90X.IOAddr + regTxStatus_b);
+ if (txcons == txprod)
+ txcons = -1;
+ }
+
+ /* Look at the TX status */
+ status = inb(INF_3C90X.IOAddr + regTxStatus_b);
+ if (status)
+ {
+ outputf("3c90x: error: the nus.");
outb(INF_3C90X.IOAddr + regTxStatus_b, 0x00);
-
- /** successful completion (sans "interrupt Requested" bit) **/
- if ((status & 0xbf) == 0x80)
- return;
-
- outputf("3c90x: Status (%hhX)", status);
- /** check error codes **/
- if (status & 0x02)
- {
- outputf("3c90x: Tx Reclaim Error (%hhX)", status);
- a3c90x_reset();
- } else if (status & 0x04) {
- outputf("3c90x: Tx Status Overflow (%hhX)", status);
- for (i=0; i<32; i++)
- _outb(0x00, INF_3C90X.IOAddr + regTxStatus_b);
- /** must re-enable after max collisions before re-issuing tx **/
- _issue_command(INF_3C90X.IOAddr, cmdTxEnable, 0);
- } else if (status & 0x08) {
- outputf("3c90x: Tx Max Collisions (%hhX)", status);
- /** must re-enable after max collisions before re-issuing tx **/
- _issue_command(INF_3C90X.IOAddr, cmdTxEnable, 0);
- } else if (status & 0x10) {
- outputf("3c90x: Tx Underrun (%hhX)", status);
- a3c90x_reset();
- } else if (status & 0x20) {
- outputf("3c90x: Tx Jabber (%hhX)", status);
- a3c90x_reset();
- } else if ((status & 0x80) != 0x80) {
- outputf("3c90x: Internal Error - Incomplete Transmission (%hhX)", status);
- a3c90x_reset();
- }
}
- /** failed after RETRY attempts **/
- outputf("3c90x: Failed to send after %d retries", retries);
- return;
-}
-
-
+ /* Set up the new txdesc. */
+ txdescs[txprod].next = 0;
+ len = 0;
+ n = 0;
+ txpbufs[txprod] = p;
+ for (; p; p = p->next)
+ {
+ txdescs[txprod].segments[n].addr = v2p(p->payload);
+ txdescs[txprod].segments[n].len = p->len | (p->next ? 0 : (1 << 31));
+ len += p->len;
+ pbuf_ref(p);
+ n++;
+ }
+ txdescs[txprod].hdr = len; /* If we wanted completion notification, bit 15 */
+
+ /* Now link the new one in, after it's been set up. */
+ txdescs[(txprod + XMIT_BUFS - 1) % XMIT_BUFS].next = v2p(&(txdescs[txprod]));
+
+ /* If the card is stopped, start it up again. */
+ if (inl(INF_3C90X.IOAddr + regDnListPtr_l) == 0)
+ {
+ outl(INF_3C90X.IOAddr + regDnListPtr_l, v2p(&(txdescs[txprod])));
+ txcons = txprod;
+ }
+
+ txprod = (txprod + 1) % XMIT_BUFS;
+
+ /* And let it proceed on its way. */
+ _issue_command(INF_3C90X.IOAddr, cmdStallCtl, 3 /* Unstall download */);
-/*** a3c90x_poll: exported routine that waits for a certain length of time
- *** for a packet, and if it sees none, returns 0. This routine should
- *** copy the packet to nic->packet if it gets a packet and set the size
- *** in nic->packetlen. Return 1 if a packet was found.
- ***/
-static int
-a3c90x_poll(struct nic *nic, int retrieve)
- {
- int i, errcode;
+#if 0
+ /** successful completion (sans "interrupt Requested" bit) **/
+ if ((status & 0xbf) == 0x80)
+ return;
- if (!(inw(INF_3C90X.IOAddr + regCommandIntStatus_w)&0x0010))
+ outputf("3c90x: Status (%hhX)", status);
+ /** check error codes **/
+ if (status & 0x02)
{
- return 0;
+ outputf("3c90x: Tx Reclaim Error (%hhX)", status);
+ a3c90x_reset();
+ } else if (status & 0x04) {
+ outputf("3c90x: Tx Status Overflow (%hhX)", status);
+ for (i=0; i<32; i++)
+ _outb(0x00, INF_3C90X.IOAddr + regTxStatus_b);
+ /** must re-enable after max collisions before re-issuing tx **/
+ _issue_command(INF_3C90X.IOAddr, cmdTxEnable, 0);
+ } else if (status & 0x08) {
+ outputf("3c90x: Tx Max Collisions (%hhX)", status);
+ /** must re-enable after max collisions before re-issuing tx **/
+ _issue_command(INF_3C90X.IOAddr, cmdTxEnable, 0);
+ } else if (status & 0x10) {
+ outputf("3c90x: Tx Underrun (%hhX)", status);
+ a3c90x_reset();
+ } else if (status & 0x20) {
+ outputf("3c90x: Tx Jabber (%hhX)", status);
+ a3c90x_reset();
+ } else if ((status & 0x80) != 0x80) {
+ outputf("3c90x: Internal Error - Incomplete Transmission (%hhX)", status);
+ a3c90x_reset();
}
+#endif
+}
- if ( ! retrieve ) return 1;
+/***************************** Receive routines *****************************/
+#define MAX_RECV_SIZE 1536
+#define RECV_BUFS 32
- /** we don't need to acknowledge rxComplete -- the upload engine
- ** does it for us.
- **/
+static rxdesc_t rxdescs[RECV_BUFS];
+static struct pbuf *rxpbufs[RECV_BUFS] = {0,};
- /** Build the up-load descriptor **/
- INF_3C90X.ReceiveUPD.UpNextPtr = 0;
- INF_3C90X.ReceiveUPD.UpPktStatus = 0;
- INF_3C90X.ReceiveUPD.DataAddr = virt_to_bus(nic->packet);
- INF_3C90X.ReceiveUPD.DataLength = 1536 + (1<<31);
+/* rxcons is the pointer to the receive descriptor that the ethernet card will
+ * write into next.
+ */
+static int rxcons = 0;
- /** Submit the upload descriptor to the NIC **/
- _outl(virt_to_bus(&(INF_3C90X.ReceiveUPD)),
- INF_3C90X.IOAddr + regUpListPtr_l);
+/* rxprod is the pointer to the receive descriptor that the driver will
+ * allocate next.
+ */
+static int rxprod = 0;
- /** Wait for upload completion (upComplete(15) or upError (14)) **/
- for(i=0;i<40000;i++);
- while((INF_3C90X.ReceiveUPD.UpPktStatus & ((1<<14) | (1<<15))) == 0)
- for(i=0;i<40000;i++);
+/* _recv_prepare fills the 3c90x's ring buffer with fresh pbufs from lwIP.
+ * The upload engine need not be stalled.
+ */
+static void _recv_prepare(struct nic *nic)
+{
+ int oldprod;
- /** Check for Error (else we have good packet) **/
- if (INF_3C90X.ReceiveUPD.UpPktStatus & (1<<14))
+ oldprod = rxprod;
+ while ((rxprod != rxcons) || !rxpbufs[rxprod])
{
- errcode = INF_3C90X.ReceiveUPD.UpPktStatus;
- if (errcode & (1<<16))
- outputf("3C90X: Rx Overrun (%hX)",errcode>>16);
- else if (errcode & (1<<17))
- outputf("3C90X: Runt Frame (%hX)",errcode>>16);
- else if (errcode & (1<<18))
- outputf("3C90X: Alignment Error (%hX)",errcode>>16);
- else if (errcode & (1<<19))
- outputf("3C90X: CRC Error (%hX)",errcode>>16);
- else if (errcode & (1<<20))
- outputf("3C90X: Oversized Frame (%hX)",errcode>>16);
- else
- outputf("3C90X: Packet error (%hX)",errcode>>16);
- return 0;
+ int i;
+ struct pbuf *p;
+
+ if (!rxpbufs[rxprod])
+ rxpbufs[rxprod] = p = pbuf_alloc(PBUF_RAW, MAX_RECV_SIZE, PBUF_POOL);
+ else {
+ outputf("WARNING: 3c90x has pbuf in slot %d", rxprod);
+ p = rxpbufs[rxprod];
+ }
+
+ if (!p)
+ {
+ outputf("3c90x: out of memory for rx pbuf?");
+ break;
+ }
+
+ rxdescs[rxprod].status = 0;
+ rxdescs[rxprod].next = 0;
+ for (i = 0; p; p = p->next, i++)
+ {
+ rxdescs[rxprod].segments[i].addr = v2p(p->payload);
+ rxdescs[rxprod].segments[i].len = p->len | (p->next ? 0 : (1 << 31));
+ }
+
+ /* Hook in the new one after and only after it's been fully set up. */
+ rxdescs[(rxprod + RECV_BUFS - 1) % RECV_BUFS].next = v2p(&(rxdescs[rxprod]));
+ rxprod = (rxprod + 1) % RECV_BUFS;
}
+
+ if (inl(INF_3C90X.IOAddr + regUpListPtr_l) == 0 && rxpbufs[oldprod]) /* Ran out of shit, and got new shit? */
+ {
+ outl(INF_3C90X.IOAddr + regUpListPtr_l, v2p(&rxdescs[oldprod]));
+ outputf("3c90x: WARNING: Ran out of rx slots");
+ }
+
+ _issue_command(INF_3C90X.IOAddr, cmdStallCtl, 1 /* Unstall upload */);
+}
- /** Ok, got packet. Set length in nic->packetlen. **/
- nic->packetlen = (INF_3C90X.ReceiveUPD.UpPktStatus & 0x1FFF);
-
- return 1;
- }
-
+/* _recv polls the ring buffer to see if any packets are available. If any
+ * are, then eth_recv is called for each available. _recv returns how many
+ * packets it received successfully. Whether _recv got any packets or not,
+ * _recv does not block, and reinitializes the ring buffer with fresh pbufs.
+ */
+static int _recv(struct nic *nic)
+{
+ int errcode, n = 0;
+ struct pbuf *p;
+
+ /* Nothing to do? */
+ while ((rxdescs[rxcons].status & ((1<<14) | (1<<15))) != 0)
+ {
+ /** Check for Error (else we have good packet) **/
+ if (rxdescs[rxcons].status & (1<<14))
+ {
+ errcode = rxdescs[rxcons].status;
+ if (errcode & (1<<16))
+ outputf("3C90X: Rx Overrun (%hX)",errcode>>16);
+ else if (errcode & (1<<17))
+ outputf("3C90X: Runt Frame (%hX)",errcode>>16);
+ else if (errcode & (1<<18))
+ outputf("3C90X: Alignment Error (%hX)",errcode>>16);
+ else if (errcode & (1<<19))
+ outputf("3C90X: CRC Error (%hX)",errcode>>16);
+ else if (errcode & (1<<20))
+ outputf("3C90X: Oversized Frame (%hX)",errcode>>16);
+ else
+ outputf("3C90X: Packet error (%hX)",errcode>>16);
+
+ p = NULL;
+ pbuf_free(rxpbufs[rxcons]); /* Bounce the old one before setting it up again. */
+ } else {
+ p = rxpbufs[rxcons];
+ pbuf_realloc(p, rxdescs[rxcons].status & 0x1FFF); /* Resize the packet to how large it actually is. */
+ }
+
+ rxpbufs[rxcons] = NULL;
+ rxdescs[rxcons].status = 0;
+ rxcons = (rxcons + 1) % RECV_BUFS;
+
+ if (p)
+ {
+ eth_recv(nic, p);
+ n++;
+ }
+ }
+ _recv_prepare(nic); /* Light the NIC up again. */
+ return n;
+}
/*** a3c90x_disable: exported routine to disable the card. What's this for?
*** the eepro100.c driver didn't have one, so I just left this one empty too.
eeprom[i] = a3c90x_internal_ReadEeprom(INF_3C90X.IOAddr, i);
}
-#ifdef CFG_3C90X_BOOTROM_FIX
- /** Set xcvrSelect in InternalConfig in eeprom. **/
- /* only necessary for 3c905b revision cards with boot PROM bug!!! */
- a3c90x_internal_WriteEeprom(INF_3C90X.IOAddr, 0x13, 0x0160);
-#endif
-
#ifdef CFG_3C90X_XCVR
if (CFG_3C90X_XCVR == 255)
{
}
}
- /** Print identification message **/
-#ifdef CFG_3C90X_BOOTROM_FIX
- if (INF_3C90X.isBrev)
- {
- outputf("NOTE: 3c905b bootrom fix enabled; has side "
- "effects. See 3c90x.txt for info.");
- }
-#endif
-
/** Retrieve the Hardware address and print it on the screen. **/
INF_3C90X.HWAddr[0] = eeprom[HWADDR_OFFSET + 0]>>8;
INF_3C90X.HWAddr[1] = eeprom[HWADDR_OFFSET + 0]&0xFF;
_outw(0, INF_3C90X.IOAddr + regStationMask_2_3w+2);
_outw(0, INF_3C90X.IOAddr + regStationMask_2_3w+4);
- /** Fill in our entry in the etherboot arp table **/
-/* XXX ? for lwip?
- for(i=0;i<ETH_ALEN;i++)
- nic.node_addr[i] = (eeprom[HWADDR_OFFSET + i/2] >> (8*((i&1)^1))) & 0xff;
-*/
-
/** Read the media options register, print a message and set default
** xcvr.
**
linktype = 0x0008;
if (mopt & 0x01)
{
- outputf("%s100Base-T4",(c++)?", ":"");
+ outputf(" 100Base-T4");
linktype = 0x0006;
}
if (mopt & 0x04)
{
- outputf("%s100Base-FX",(c++)?", ":"");
+ outputf(" 100Base-FX");
linktype = 0x0005;
}
if (mopt & 0x10)
{
- outputf("%s10Base-2",(c++)?", ":"");
+ outputf(" 10Base-2");
linktype = 0x0003;
}
if (mopt & 0x20)
{
- outputf("%sAUI",(c++)?", ":"");
+ outputf(" AUI");
linktype = 0x0001;
}
if (mopt & 0x40)
{
- outputf("%sMII",(c++)?", ":"");
+ outputf(" MII");
linktype = 0x0006;
}
if ((mopt & 0xA) == 0xA)
{
- outputf("%s10Base-T / 100Base-TX",(c++)?", ":"");
+ outputf(" 10Base-T / 100Base-TX");
linktype = 0x0008;
}
else if ((mopt & 0xA) == 0x2)
{
- outputf("%s100Base-TX",(c++)?", ":"");
+ outputf(" 100Base-TX");
linktype = 0x0008;
}
else if ((mopt & 0xA) == 0x8)
{
- outputf("%s10Base-T",(c++)?", ":"");
+ outputf(" 10Base-T");
linktype = 0x0008;
}
- outputf(".");
/** Determine transceiver type to use, depending on value stored in
** eeprom 0x16
/** Set the RX filter = receive only individual pkts & multicast & bcast. **/
_issue_command(INF_3C90X.IOAddr, cmdSetRxFilter, 0x01 + 0x02 + 0x04);
+
+ /* Stick some packets in the queue. */
+ _recv_prepare(&nic);
+
+ /* And light up the RX engine. */
_issue_command(INF_3C90X.IOAddr, cmdRxEnable, 0);
-
/**
** set Indication and Interrupt flags , acknowledge any IRQ's
**/
_issue_command(INF_3C90X.IOAddr, cmdAcknowledgeInterrupt, 0x661);
/* * Set our exported functions **/
- nic.poll = a3c90x_poll;
- nic.transmit = a3c90x_transmit;
+ nic.recv = _recv;
+ nic.transmit = _transmit;
+ memcpy(nic.hwaddr, INF_3C90X.HWAddr, 6);
eth_register(&nic);
return 1;