4 #define PTE_FOR(x) (((unsigned int)(x) >> 12) & 0x3FF)
5 #define PDE_FOR(x) ((unsigned int)(x) >> 22)
6 #define ADDR_12_MASK(x) ((unsigned int)(x) & ~((1 << 12) - 1))
7 #define ADDR_22_MASK(x) ((unsigned int)(x) & ~((1 << 22) - 1))
8 #define LOWER_12(x) ((unsigned int)(x) & ((1 << 12) - 1))
9 #define LOWER_22(x) ((unsigned int)(x) & ((1 << 22) - 1))
11 #define PDE_4M_ADDR_SHIFT 22
12 #define PTE_4K_ADDR_SHIFT 12
13 #define PDE_TABLE_ADDR_SHIFT 12
14 #define PTE_FRAME_ADDR_MASK (~((1 << PTE_4K_ADDR_SHIFT) - 1))
15 #define PDE_TABLE_ADDR_MASK (~((1 << PDE_TABLE_ADDR_SHIFT) - 1))
17 #define PDE_ATTRIB_INDEX (1 << 12)
18 #define PDE_GLOBAL (1 << 8)
19 #define PDE_PAGE_SIZE (1 << 7)
20 #define PDE_DIRTY (1 << 6)
21 #define PDE_ACCESSED (1 << 5)
22 #define PDE_NO_CACHE (1 << 4)
23 #define PDE_WRITE_THROUGH (1 << 3)
24 #define PDE_USER (1 << 2)
25 #define PDE_READ_WRITE (1 << 1)
26 #define PDE_PRESENT (1 << 0)
28 #define PTE_GLOBAL (1 << 8)
29 #define PTE_ATTRIB_INDEX (1 << 7)
30 #define PTE_DIRTY (1 << 6)
31 #define PTE_ACCESSED (1 << 5)
32 #define PTE_NO_CACHE (1 << 4)
33 #define PTE_WRITE_THROUGH (1 << 3)
34 #define PTE_USER (1 << 2)
35 #define PTE_READ_WRITE (1 << 1)
36 #define PTE_PRESENT (1 << 0)
38 asm ("get_cr3: mov %cr3, %eax \n ret");
41 void * l2p (void * addr) {
43 uint32_t * cr3 = get_cr3();
44 uint32_t * page_table;
47 pde = cr3[PDE_FOR(addr)];
49 if (!(pde & PDE_PRESENT)) {
53 if (pde & PDE_PAGE_SIZE) {
54 return (void *)(ADDR_22_MASK(pde) | LOWER_22(addr));
56 page_table = (uint32_t *)(ADDR_12_MASK(pde));
57 pte = page_table[PTE_FOR(addr)];
59 if (!pte & PTE_PRESENT) {
62 return (void *)(ADDR_12_MASK(pte) | LOWER_12(addr));
66 packet_t * check_packet (uint32_t logical_base) {
67 packet_t * physical_base;
69 if (LOWER_12(logical_base) != 0) return 0;
71 physical_base = l2p((void *)logical_base);
73 if (!physical_base) return 0;
74 if (physical_base->signature != 0x1BADD00D) return 0;