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[netwatch.git] / ich2 / smi.c
1 #include <smi.h>
2 #include <pci.h>
3 #include <io.h>
4 #include <stdint.h>
5 #include <vga-overlay.h>
6 #include <reg-82801b.h>
7 #include <output.h>
8
9 static uint16_t _get_PMBASE()
10 {
11         static long pmbase = -1;
12         
13         if (pmbase == -1)       /* Memoize it so that we don't have to hit PCI so often. */
14                 pmbase = pci_read32(ICH2_LPC_BUS, ICH2_LPC_DEV, ICH2_LPC_FN, ICH2_LPC_PCI_PMBASE) & ICH2_PMBASE_MASK;
15         
16         return pmbase;
17 }
18
19 void smi_disable()
20 {
21         unsigned short smi_en = _get_PMBASE() + ICH2_PMBASE_SMI_EN;
22         outl(smi_en, inl(smi_en) & ~ICH2_SMI_EN_GBL_SMI_EN);
23 }
24
25 void smi_enable()
26 {
27         unsigned short smi_en = _get_PMBASE() + ICH2_PMBASE_SMI_EN;
28         outl(smi_en, inl(smi_en) | ICH2_SMI_EN_GBL_SMI_EN);
29 }
30
31 unsigned long smi_status()
32 {
33         unsigned short smi_sts = _get_PMBASE() + ICH2_PMBASE_SMI_STS;
34         return inl(smi_sts);
35 }
36
37 void smi_poll()
38 {
39         unsigned long sts = smi_status();
40         
41         if (sts & ICH2_SMI_STS_BIOS_STS)
42         {
43                 output("Unhandled: BIOS_STS");
44                 outl(_get_PMBASE() + ICH2_PMBASE_SMI_STS, ICH2_SMI_STS_BIOS_STS);
45         }
46         
47         if (sts & ICH2_SMI_STS_LEGACY_USB_STS)
48         {
49                 output("Unhandled: LEGACY_USB_STS");
50                 outl(_get_PMBASE() + ICH2_PMBASE_SMI_STS, ICH2_SMI_STS_LEGACY_USB_STS);
51         }
52         
53         if (sts & ICH2_SMI_STS_SLP_SMI_STS)
54         {
55                 output("Unhandled: SLP_SMI_STS");
56                 outl(_get_PMBASE() + ICH2_PMBASE_SMI_STS, ICH2_SMI_STS_SLP_SMI_STS);
57         }
58         
59         if (sts & ICH2_SMI_STS_APM_STS)
60         {
61                 output("Unhandled: APM_STS");
62                 outl(_get_PMBASE() + ICH2_PMBASE_SMI_STS, ICH2_SMI_STS_APM_STS);
63         }
64         
65         if (sts & ICH2_SMI_STS_SWSMI_TMR_STS)   // Ack it, then request another.
66         {
67                 outl(_get_PMBASE() + ICH2_PMBASE_SMI_STS, ICH2_SMI_STS_SWSMI_TMR_STS);
68                 outl(_get_PMBASE() + ICH2_PMBASE_SMI_EN,
69                         inl(_get_PMBASE() + ICH2_PMBASE_SMI_EN) & ~ICH2_SMI_EN_SWSMI_TMR_EN);
70                 outl(_get_PMBASE() + ICH2_PMBASE_SMI_EN,
71                         inl(_get_PMBASE() + ICH2_PMBASE_SMI_EN) | ICH2_SMI_EN_SWSMI_TMR_EN);
72         }
73         
74         if (sts & ICH2_SMI_STS_PM1_STS_REG)
75         {
76                 unsigned short pm1_sts = inw(_get_PMBASE() + ICH2_PMBASE_PM1_STS);
77                 unsigned short pm1_en = inw(_get_PMBASE() + ICH2_PMBASE_PM1_EN);
78                 
79                 pm1_sts &= pm1_en;
80                 if (pm1_sts & ICH2_PM1_STS_RTC_STS)
81                 {
82                         output("Unhandled: PM1_STS: RTC_STS");
83                         outw(_get_PMBASE() + ICH2_PMBASE_PM1_STS, ICH2_PM1_STS_RTC_STS);
84                 }
85                 
86                 if (pm1_sts & ICH2_PM1_STS_PWRBTN_STS)
87                 {
88                         output("Unhandled: PM1_STS: PWRBTN_STS");
89                         outw(_get_PMBASE() + ICH2_PMBASE_PM1_STS, ICH2_PM1_STS_PWRBTN_STS);
90                 }
91                 
92                 if (pm1_sts & ICH2_PM1_STS_GBL_STS)
93                 {
94                         output("Unhandled: PM1_STS: GBL_STS");
95                         outw(_get_PMBASE() + ICH2_PMBASE_PM1_STS, ICH2_PM1_STS_GBL_STS);
96                 }
97                 
98                 if (pm1_sts & ICH2_PM1_STS_TMROF_STS)
99                 {
100                         output("Unhandled: PM1_STS: TMROF_STS");
101                         outw(_get_PMBASE() + ICH2_PMBASE_PM1_STS, ICH2_PM1_STS_TMROF_STS);
102                 }
103                 
104                 outl(_get_PMBASE() + ICH2_PMBASE_SMI_STS, ICH2_SMI_STS_PM1_STS_REG);
105         }
106         
107         if (sts & ICH2_SMI_STS_GPE0_STS)
108         {
109                 /* XXX -- trawl through GPE0_STS to see what happened */
110                 output("XXX Unhandled: GPE0_STS (expect lockup)");
111         }
112         
113         if (sts & ICH2_SMI_STS_GPE1_STS)
114         {
115                 /* XXX -- trawl through GPE1_STS to see what happened */
116                 output("XXX Unhandled: GPE1_STS (expect lockup)");
117         }
118         
119         if (sts & ICH2_SMI_STS_MCSMI_STS)
120         {
121                 output("Unhandled: MCSMI_STS");
122                 outl(_get_PMBASE() + ICH2_PMBASE_SMI_STS, ICH2_SMI_STS_MCSMI_STS);
123         }
124         
125         if (sts & ICH2_SMI_STS_DEVMON_STS)
126         {
127                 unsigned short mon_smi = inw(_get_PMBASE() + ICH2_PMBASE_MON_SMI);
128                 unsigned long devact_sts = inl(_get_PMBASE() + ICH2_PMBASE_DEVACT_STS);
129                 unsigned long devtrap_en = inl(_get_PMBASE() + ICH2_PMBASE_DEVTRAP_EN);
130                 if (((mon_smi & 0x0F00) >> 8) & ((mon_smi & 0xF000) >> 12))
131                         outputf("Unhandled: MON_SMI (%04x)", mon_smi);
132                 if (devact_sts & devtrap_en)
133                         outputf("Unhandled: DEVTRAP (%08x)", devact_sts & devtrap_en);
134         }
135         
136         if (sts & ICH2_SMI_STS_TCO_STS)
137         {
138                 output("Unhandled: TCO_STS");
139                 outl(_get_PMBASE() + ICH2_PMBASE_SMI_STS, ICH2_SMI_STS_TCO_STS);
140         }
141         
142         if (sts & ICH2_SMI_STS_PERIODIC_STS)
143         {
144                 output("Unhandled: PERIODIC_STS");
145                 outl(_get_PMBASE() + ICH2_PMBASE_SMI_STS, ICH2_SMI_STS_PERIODIC_STS);
146         }
147         
148         if (sts & ICH2_SMI_STS_SERIRQ_SMI_STS)
149         {
150                 output("Unhandled: SERIRQ_SMI_STS");
151                 outl(_get_PMBASE() + ICH2_PMBASE_SMI_STS, ICH2_SMI_STS_SERIRQ_SMI_STS);
152         }
153         
154         if (sts & ICH2_SMI_STS_SMBUS_SMI_STS)
155         {
156                 output("Unhandled: SMBUS_SMI_STS");
157                 outl(_get_PMBASE() + ICH2_PMBASE_SMI_STS, ICH2_SMI_STS_SMBUS_SMI_STS);
158         }
159         
160         if (smi_status() & ~ICH2_SMI_STS_PM1_STS_REG)   /* Either the chipset is buggy, or we are. */
161                 outputf("WARN: couldn't clear SMI_STS! (%08x)", smi_status());
162         
163         outl(_get_PMBASE() + ICH2_PMBASE_SMI_EN,
164                 inl(_get_PMBASE() + ICH2_PMBASE_SMI_EN) |
165                         ICH2_SMI_EN_EOS |
166                         ICH2_SMI_EN_GBL_SMI_EN);
167 }
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