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Reg the init variables -- takes us to 83.842MHz! 8678 LUTs, 4694 slices post synthesis.
[mandelfpga.git] / ctoreadmemb.c
2008-03-15 Joshua WiseInitial revision -- unknown as to whether it works... blob | commitdiff | raw
Pipelined realtime renderer of the Mandelbrot set on a Xilinx FPGA
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