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(parent: a3a4354) | patch
Reg the init variables -- takes us to 83.842MHz! 8678 LUTs, 4694 slices post synthesis.
authorJoshua Wise <joshua@rebirth.joshuawise.com>
Wed, 19 Mar 2008 07:01:45 +0000 (03:01 -0400)
committerJoshua Wise <joshua@rebirth.joshuawise.com>
Wed, 19 Mar 2008 07:01:45 +0000 (03:01 -0400)
commit79af494a1f40aff429c60355790bf6bb0c81c51e
treee5522accd9b8268bea7495994ebbc0c4ca4ffb71tree | snapshot
parenta3a4354bafd8467e9b79c037314da6644f41b470commit | diff
Reg the init variables -- takes us to 83.842MHz! 8678 LUTs, 4694 slices post synthesis.
Main.v diff | blob | blame | history
Pipelined realtime renderer of the Mandelbrot set on a Xilinx FPGA
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