]> Joshua Wise's Git repositories - mandelfpga.git/history - FPGA.pal
Reg the init variables -- takes us to 83.842MHz! 8678 LUTs, 4694 slices post synthesis.
[mandelfpga.git] / FPGA.pal
2008-03-15 Joshua WiseInitial revision -- unknown as to whether it works...
This page took 0.038585 seconds and 8 git commands to generate.