]> Joshua Wise's Git repositories - fpgaboy.git/history - GBZ80Core.v
Add RET/IRET. Fix a bug in RST where the PC pushed to the stack was incorrect.
[fpgaboy.git] / GBZ80Core.v
2008-03-31 Joshua WiseAdd RET/IRET. Fix a bug in RST where the PC pushed...
2008-03-31 Joshua WiseRST insn
2008-03-30 Joshua WiseNOP, and bug fixes
2008-03-30 Joshua WiseADC, AND, OR, XOR
2008-03-30 Joshua WiseOur first ALU operation -- ADD
2008-03-30 Joshua WiseLD{D,I} A,(HL) and LD{D,I} (HL),A
2008-03-30 Joshua WiseLDH A,(C) and LDH (C), A
2008-03-29 Joshua WiseMake it synthesizable.
2008-03-29 Joshua WisePUSH and POP work
2008-03-29 Joshua WiseLD reg, imm16 and LD SP,HL
2008-03-29 Joshua WiseLD with HLs
2008-03-29 Joshua WiseLD reg, reg
2008-03-29 Joshua WiseInitial
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