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Add cut 1 of a cellram module
[fpgaboy.git] / Uart.v
2008-05-04 Joshua WiseStart changing things to happen on posedge clock. blob | commitdiff | raw
2008-05-03 Joshua WiseAdd some verilator and isim compatibility blob | commitdiff | raw | diff to current
2008-04-07 Joshua WiseALU8IMM blob | commitdiff | raw | diff to current
2008-04-06 Joshua WiseClean up some warnings. blob | commitdiff | raw | diff to current
2008-04-02 Joshua WiseFix bug in UART where idle state is not entered by... blob | commitdiff | raw | diff to current
2008-04-01 Joshua WiseJP blob | commitdiff | raw | diff to current
2008-04-01 Joshua WiseSpit lots of A out of the UART. blob | commitdiff | raw | diff to current
2008-03-31 Joshua WiseHALP ABOUT TO BLOW AWY PROJECT blob | commitdiff | raw | diff to current
Partial Nintendo GameBoy / GBZ80 implementation on a Xilinx FPGA
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