]> Joshua Wise's Git repositories - fpgaboy.git/history - LCDC.v
Add cut 1 of a cellram module
[fpgaboy.git] / LCDC.v
2008-05-04 Joshua WiseYaaay, everything is posedge now
2008-05-04 Joshua WiseFlop the clock polarity of the LCDC around.
2008-04-28 Joshua WiseFix insn_bit. HOLY SHIT THE BOOT ROM WORKS c.c
2008-04-19 Joshua WiseRemove gated clock and hence remove S.
2008-04-19 Joshua WiseGate off vraminuse, oaminuse, etc with wehther the...
2008-04-19 Joshua WiseFix some sync issues? Maybe?
2008-04-19 Joshua WiseMake it easy to see what's going wrong.
2008-04-19 Joshua WiseIt typechecks! Ship it!
2008-04-19 Joshua WiseFix tileaddr bug. Make bus interface more explicit.
2008-04-18 Joshua WiseCut 1 at output
2008-04-18 Joshua WiseVideo RAM cut 1 -- on distributed ram
2008-04-18 Joshua WiseVideo RAM and a makefile change
2008-04-14 Joshua WiseCut one at a framebuffer
2008-04-14 Joshua WiseSome LCDC IRQ stuffs. Working on fixing ldm_a
2008-04-13 Joshua WiseAdd mock up LCDC
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