| 2008-04-03 |
Joshua Wise | Add an instruction tester to the test ROM. |
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| 2008-04-01 |
Joshua Wise | Fix not-taken jumps. Add more ALU ops. Add ALU A ops. |
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| 2008-04-01 |
Joshua Wise | JP |
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| 2008-04-01 |
Joshua Wise | Spit lots of A out of the UART. |
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| 2008-04-01 |
Joshua Wise | Get it running on the board. |
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| 2008-03-31 |
Joshua Wise | HALP ABOUT TO BLOW AWY PROJECT |
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| 2008-03-31 |
Joshua Wise | Fix RAM bugs with kludge. Fix CALL bug. CALL test case. |
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| 2008-03-31 |
Joshua Wise | Add CALL (untested) and ROM and internal RAM |
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| 2008-03-31 |
Joshua Wise | Fix part of the indentation tragedy. |
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| 2008-03-31 |
Joshua Wise | Add RET/IRET. Fix a bug in RST where the PC pushed... |
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| 2008-03-31 |
Joshua Wise | RST insn |
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| 2008-03-30 |
Joshua Wise | NOP, and bug fixes |
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| 2008-03-30 |
Joshua Wise | ADC, AND, OR, XOR |
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| 2008-03-30 |
Joshua Wise | Our first ALU operation -- ADD |
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| 2008-03-30 |
Joshua Wise | LD{D,I} A,(HL) and LD{D,I} (HL),A |
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| 2008-03-30 |
Joshua Wise | LDH A,(C) and LDH (C), A |
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| 2008-03-29 |
Joshua Wise | Make it synthesizable. |
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| 2008-03-29 |
Joshua Wise | PUSH and POP work |
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| 2008-03-29 |
Joshua Wise | LD reg, imm16 and LD SP,HL |
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| 2008-03-29 |
Joshua Wise | LD with HLs |
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| 2008-03-29 |
Joshua Wise | LD reg, reg |
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| 2008-03-29 |
Joshua Wise | Initial |
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git.joshuawise.com / fpgaboy.git / history