]> Joshua Wise's Git repositories - fpgaboy.git/commitdiff
PS2 cut 1
authorJoshua Wise <joshua@rebirth.joshuawise.com>
Fri, 9 May 2008 12:07:34 +0000 (08:07 -0400)
committerJoshua Wise <joshua@rebirth.joshuawise.com>
Fri, 9 May 2008 12:07:34 +0000 (08:07 -0400)
CoreTop.prj
CoreTop.ucf
Makefile
PS2Button.v
System.v

index 0df5890537898d3959f693b9fb54a2621fb2bc43..4f1c839b65cab9872c07100b4c1cdf5ff3a5443c 100644 (file)
@@ -12,3 +12,4 @@ verilog work "Sound1.v"
 verilog work "Sound2.v"
 verilog work "Soundcore.v"
 verilog work "Buttons.v"
+verilog work "PS2Button.v"
index 1981fcd3e0781a51ce19af65482a92eb1411154a..d065b2254c2dbc64a19e13b05bb706a9425954dc 100644 (file)
@@ -103,3 +103,5 @@ NET "cr_A<20>" LOC="K3" | SLEW="fast";
 NET "cr_A<21>" LOC="D1" | SLEW="fast";
 NET "cr_A<22>" LOC="K6" | SLEW="fast";
 
+NET "PS2C" LOC="R12";
+NET "PS2D" LOC="P11";
\ No newline at end of file
index f42e5b99520a30ccd94163f5a48b78a9e71c77fb..15107c3000d49871784ffc99370b4d86a6d1c224 100644 (file)
--- a/Makefile
+++ b/Makefile
@@ -1,5 +1,5 @@
 VLOGS = 7seg.v Framebuffer.v GBZ80Core.v Interrupt.v LCDC.v Sound1.v \
-       Sound2.v Soundcore.v System.v Timer.v Uart.v  Buttons.v
+       Sound2.v Soundcore.v System.v Timer.v Uart.v Buttons.v PS2Button.v
 
 VLOGS_ALL = $(VLOGS) insn_call-callcc.v insn_incdec16.v insn_jr-jrcc.v \
        insn_ld_reg_hl.v insn_ld_reg_reg.v insn_nop.v insn_ret-retcc.v \
index e65226c37b6903b94d2e48e8504ff5e6fa73d277..571af435a1b2adcf864d02fa2898dbd0422458b6 100644 (file)
@@ -1,19 +1,13 @@
 module PS2Button(
        input inclk,
        input indata,
-       input rst,
-       output outclk,
-       output outdata,
-       output reg [7:0] buttons
+       output wire [7:0] buttons
        );
 
-       assign outdata = 1'b1;
-       assign outclk = 1'b1;
-
-       reg bitcount [3:0] = 0;
-       reg [7:0] key;
-       reg keyarrow, keyup, parity;
-       reg key_a,key_b,key_st,key_sel,key_up,key_dn,key_l,key_r;
+       reg [3:0] bitcount = 0;
+       reg [7:0] key = 0;
+       reg keyarrow = 0, keyup = 0, parity = 0;
+       reg key_a = 0,key_b = 0,key_st = 0,key_sel = 0,key_up = 0,key_dn = 0,key_l = 0,key_r = 0;
 
        assign buttons = {key_st,key_sel,key_b,key_a,key_dn,key_up,key_l,key_r};
 
index 931e90029c7c2c438fed2c2a7c6726baf7e4c008..68de591a44517b3318560559412ad13c9e6c8739 100644 (file)
--- a/System.v
+++ b/System.v
@@ -232,6 +232,7 @@ module CoreTop(
        output wire cr_nADV, cr_nCE, cr_nOE, cr_nWE, cr_CRE, cr_nLB, cr_nUB, cr_CLK,
        output wire [22:0] cr_A,
        inout [15:0] cr_DQ,
+       input ps2c, ps2d,
 `endif
        output wire hs, vs,
        output wire [2:0] r, g,
@@ -256,6 +257,7 @@ module CoreTop(
        IBUFG iclkbuf(.O(xtalb), .I(xtal));
        CPUDCM dcm (.CLKIN_IN(xtalb), .CLKFX_OUT(clk));
        pixDCM pixdcm (.CLKIN_IN(xtalb), .CLKFX_OUT(vgaclk));
+       wire [7:0] ps2buttons;
 `endif
 
        wire [15:0] addr [1:0];
@@ -348,16 +350,31 @@ module CoreTop(
                .vgag(g),
                .vgab(b));
 
+       wire [7:0] sleds;
+`ifdef isim
+       assign leds = sleds;
+`else
+       assign leds = sleds | ps2buttons;
+`endif
        Switches sw(
                .clk(clk),
                .address(addr[0]),
                .data(data[0]),
                .wr(wr[0]),
                .rd(rd[0]),
-               .ledout(leds),
+               .ledout(sleds),
                .switches(switches)
                );
        
+`ifdef isim
+`else
+       PS2Button ps2(
+               .inclk(ps2c),
+               .indata(ps2d),
+               .buttons(ps2buttons)
+               );
+`endif
+       
        Buttons ass(
                .core_clk(clk),
                .addr(addr[0]),
@@ -365,7 +382,11 @@ module CoreTop(
                .wr(wr[0]),
                .rd(rd[0]),
                .int(btnirq),
+       `ifdef isim
                .buttons(switches)
+       `else
+               .buttons(ps2buttons)
+       `endif
                );
 
        AddrMon amon(
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