`define YRES 480
`define YFPORCH 10
`define YSYNC 2
-`define YBPORCH 29
+`define YBPORCH 25
`define XOFS ((640-160)/2)
`define YOFS ((480-144)/2)
reg [2:0] failandloss;
assign {vgar, vgag, vgab} =
- ((vgax > `XOFS) && (vgax < (`XOFS + 160)) && (vgay > `YOFS) && (vgay < (`YOFS + 144))) ? {failandloss[2],2'b0,failandloss[1],2'b0,failandloss[0],1'b0} :
- ((vgax < 640) && (vgay < 480)) ? 8'b11100000 :
+ ((vgax > `XOFS) && (vgax < (`XOFS + 161)) && (vgay > `YOFS) && (vgay < (`YOFS + 144))) ? {failandloss[2],2'b0,failandloss[1],2'b0,failandloss[0],1'b0} :
+ ((vgax < 640) && (vgay < 480)) ? 8'b00000000 :
8'b00000000;
always @(posedge vgaclk)
if (vgay >= (`YRES + `YFPORCH + `YSYNC + `YBPORCH)) begin
vgafb <= 0;
vgay <= 0;
- end else
+ vgax <= 0;
+ end else begin
vgay <= vgay + 1;
- vgax <= 0;
+ vgax <= 0;
+ end
end else
vgax <= vgax + 1;
vgahs <= (vgax >= (`XRES + `XFPORCH)) && (vgax < (`XRES + `XFPORCH + `XSYNC));
vgavs <= (vgay >= (`YRES + `YFPORCH)) && (vgay < (`YRES + `YFPORCH + `YSYNC));
- if ((vgax > `XOFS) && (vgax < (`XOFS + 160)) && (vgay > `YOFS) && (vgay < (`YOFS + 144))) begin
+ if ((vgax > `XOFS) && (vgax < (`XOFS + 161)) && (vgay > `YOFS) && (vgay < (`YOFS + 144))) begin
vgafb <= vgafb + 1;
failandloss <= fb[vgafb + 1];
end
ld a, $04 ;start timer, 4.096KHz
ld c, $07
ld [c], a
-
+
ld hl, $DF81
xor a
ld [hli], a
db $0D,$0A,$1B,"[1mFPGABoy Diagnostic ROM",$1B,"[0m",$0D,$0A,0
vbl:
+ PUSH AF
+ PUSH BC
+ PUSH DE
+ PUSH HL
+
+ xor a
+ ld c, $0F
+ ld [c], a
+
+ ld c, $42 ; SCY
+ ld a, [c]
+ inc a
+ ld [c], a
+
+ POP HL
+ POP DE
+ POP BC
+ POP AF
+
+ RETI
+
lcdc:
PUSH AF
PUSH BC
ld c, $0F
ld [c], a
+ ld c, $45 ; LYC
+ ld a, [c]
+ inc a
+ ld [c], a
+
ld hl, $DF82
ld a, [hld]
cp 0