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[fpgaboy.git] / diag.asm
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1 section "end",HOME[1024]
2 nop
3
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4 SECTION "a",HOME[$00]
5
6start: jp main
7
8 section "vbl",HOME[$40]
9 jp vbl
10
11 section "lcdc",HOME[$48]
12 jp lcdc
13
14 section "tmro",HOME[$50]
15 jp tmro
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16
17main:
5bac4cf0 18 ld a, $FF
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19 ld c, $51
20 ld [c], a
00573fd5 21
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22 ld sp, $DFF0
23
30ef1ae0 24 ld a, $04 ;start timer, 4.096KHz
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25 ld c, $07
26 ld [c], a
03202f62 27
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28 ld hl, $DF81
29 xor a
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30 ld [hli], a
31 ld [hli], a
30ef1ae0 32
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33 ld hl, signon
34 call puts
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35
36 ei
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37
38 call memtest
39
40 call insntest
41
42 call waitsw
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43
44 di
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45
46 jr main
47
48signon:
49 db $0D,$0A,$1B,"[1mFPGABoy Diagnostic ROM",$1B,"[0m",$0D,$0A,0
50
00573fd5 51vbl:
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52 PUSH AF
53 PUSH BC
54 PUSH DE
55 PUSH HL
56
57 xor a
58 ld c, $0F
59 ld [c], a
60
61 ld c, $42 ; SCY
62 ld a, [c]
63 inc a
64 ld [c], a
65
66 POP HL
67 POP DE
68 POP BC
69 POP AF
70
71 RETI
72
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73lcdc:
74 PUSH AF
fe3dc890 75 PUSH BC
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76
77 xor a
78 ld c, $0F
79 ld [c], a
80
fe3dc890 81 POP BC
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82 POP AF
83
84 reti
85
86tmro:
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87 PUSH AF
88 PUSH BC
89 PUSH DE
90 PUSH HL
91
92 xor a
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93 ld c, $0F
94 ld [c], a
30ef1ae0 95
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96 ld c, $45 ; LYC
97 ld a, [c]
98 inc a
99 ld [c], a
100
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101 ld hl, $DF82
102 ld a, [hld]
103 cp 0
104 jr z, .noprint
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105 ld a, $41 ; print A
106 call putc
7e4f4505 107.noprint:
fe3dc890 108 inc [hl]
30ef1ae0 109 ld a, [hl]
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110 ld c, $51
111 ld [c], a
30ef1ae0 112
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113 POP HL
114 POP DE
115 POP BC
116 POP AF
117 RETI
30ef1ae0 118
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119; Memory tester: writes h ^ l to all addresses from C000 to DF80.
120memtest:
121 ld hl,memteststr
122 call puts
123
124 ld hl, $C001 ; Write loop
125.wr:
126 ld a,h
127 xor l
128 ld [hli],a
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129 ld a, h
130 cp $DF
5bac4cf0 131 jr nz, .wr
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132 ld a, l
133 cp $80
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134 jr nz, .wr
135
136 ld hl, $C001 ; Read loop
137.rd:
138 ld a,h
139 xor l
140 ld b,a
141 ld a, [hli]
142 cp b
143 jr nz, .memfail
144
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145 ld a, h
146 cp $DF
5bac4cf0 147 jr nz, .rd
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148 ld a, l
149 cp $80
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150 jr nz, .rd
151
152 ld hl, testokstr ; Say we're OK
153 call puts
154 ret
155.memfail: ; Say we failed (sadface)
156 ; decrement hl the easy way
157 ld a,[hld]
158 push hl
159 ld hl, failatstr
160 call puts
161 pop hl
162 ld a, h
163 call puthex
164 ld a, l
165 call puthex
166 ld a, $0A
167 call putc
168 ld a, $0D
169 call putc
170 ret
171memteststr:
172 db "Testing memory from $C000 to $DF80...",0
173testokstr:
174 db " OK!",$0D,$0A,0
175failatstr:
176 db " Test failed at $",0
177
178puthex: ; Put two hex nibbles to the serial console.
179 push af
180 rra
181 rra
182 rra
183 rra
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184 and $0F
185 add $30
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186 call putc
187 pop af
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188 and $0F
189 add $30
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190 call putc
191 ret
192
193; Wait for switches to be flipped on and off again.
194waitsw:
195 ld hl,waitswstr
196 call puts
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197
198 ld hl,$DF82
199 ld a, 1
200 ld [hl], a
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201
202 ld c, $51
203 xor a
204 ld [c],a
205
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206.loop1:
207 ld a,[c]
f888201b 208 cp $0
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209 jr z,.loop1
210.loop2:
211 ld a,[c]
f888201b 212 cp $0
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213 jr nz,.loop2
214 ret
215
216waitswstr:
217 db "Diagnostic ROM complete; flip switches to nonzero and then to zero to reset. Expect A.",$0D,$0A,0
218
219; Core instruction basic acceptance tests.
220insntest:
221 ld hl, .insnteststr
222 call puts
223
224 ; Test PUSH and POP.
225 ld b, $12
226 ld c, $34
227 ld d, $56
228 ld e, $78
229 push bc
230 pop de
231 ld hl, .pushpopfail
232 ld a, d
233 cp b
234 jr nz,.fail
235 ld a, e
236 cp c
237 jr nz,.fail
238
239 ; Test ALU (HL).
240 ld hl, .ff
241 ld a, $FF
242 xor [hl]
243 ld hl, .xorhlfail
244 jr nz, .fail
245
246 ; Test JP (HL)
247 ld hl, .jphl
248 jp [hl]
249 ld hl, .jphlfail
250 jr .fail
251 rst $00
252.jphl:
253
254 ; Test JR
255 ld a, $FF
f888201b 256 cp $0
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257 jr nz,.jr
258 ld hl, .jrfail
259 jr .fail
260 rst $00
261.jr:
262
263 ; Test inc16
264 ld d, $12
265 ld e, $FF
266 ld hl, .inc16fail
267 inc de
268 ld a, $13
269 cp d
270 jr nz, .fail
271 ld a, $00
272 cp e
273 jr nz, .fail
274
275 ; Test CP.
276 ld hl, .cpfail
277 ld a, $10
f888201b 278 cp $20
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279 jr nc,.fail
280 ld a, $20
f888201b 281 cp $10
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282 jr c,.fail
283
284 ; Test CPL
285 ld hl, .cplfail
286 ld a, $55
5bac4cf0 287 cpl
f888201b 288 cp $AA
5bac4cf0 289 jr nz,.fail
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290
291 ; Test DI/EI delay
292 di
00573fd5 293 ld hl, .dinocausefail
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294 ld c, $0F ; First, wait until an interrupt happens...
295.wait: ld a, [c]
00573fd5 296 and $04
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297 cp 0
298 jr z, .wait
299 ei ; Now make sure that an IRQ didn't happen on EI/DI
300 di
301 ld a, [c]
00573fd5 302 and $04
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303 cp 0
304 jr z, .fail
00573fd5 305 ld hl, .dicausefail
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306 ei ; Make sure that an IRQ does happen on EI/NOP/DI
307 nop
00573fd5 308 nop
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309 di
310 ld a, [c]
00573fd5 311 and $04
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312 cp 0
313 jr nz, .fail
314 ei
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315
316 ld hl, .ok
317 call puts
318 ret
319.fail:
f9000d73 320 ei
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321 call puts
322 ld hl, .testfailed
323 call puts
324 ret
325.insnteststr:
326 db "Testing instructions... ",0
327.pushpopfail:
328 db "PUSH/POP",0
329.ff:
330 db $FF
331.xorhlfail:
332 db "XOR [HL]",0
333.jphlfail:
334 db "JP [HL]",0
335.jrfail:
336 db "JR",0
337.cpfail:
338 db "CP",0
339.cplfail:
340 db "CPL",0
341.inc16fail:
342 db "INC16",0
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343.dinocausefail:
344 db "DI/EI does not cause interrupt",0
345.dicausefail:
346 db "DI/NOP/EI cause interrupt",0
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347.testfailed:
348 db " test failed.",$0D,$0A,0
349.ok:
350 db "OK!",$0D,$0A,0
351
352; Serial port manipulation functions.
353putc:
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354 ld c, $50
355 push af
356.waitport:
357 ld a,[c]
f888201b 358 cp $00
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359 jr nz,.waitport
360 pop af
361 ld [c],a
362 ret
363
364puts:
365 ld a, [hli]
f888201b 366 cp $00
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367 ret z
368 call putc
369 jr puts
fe3dc890 370
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