Add fetch module
authorJoshua Wise <joshua@nyus.joshuawise.com>
Mon, 22 Dec 2008 07:09:40 +0000 (02:09 -0500)
committerJoshua Wise <joshua@nyus.joshuawise.com>
Mon, 22 Dec 2008 07:09:40 +0000 (02:09 -0500)
fetch.v [new file with mode: 0644]

diff --git a/fetch.v b/fetch.v
new file mode 100644 (file)
index 0000000..885b29c
--- /dev/null
+++ b/fetch.v
@@ -0,0 +1,40 @@
+module Fetch(
+       input clk,
+       input Nrst,
+       
+       output wire [31:0] rd_addr,
+       output wire rd_req,
+       input rd_wait,
+       input [31:0] rd_data,
+       
+       input stall,
+       input jmp,
+       input [31:0] jmppc;
+       output wire bubble,
+       output wire [31:0] insn,
+       output reg [31:0] pc);
+
+       reg [31:0] prevpc;
+       initial
+               prevpc <= 32'h0;
+       always @(negedge Nrst)
+               prevpc <= 32'h0;
+       
+       always @(*)
+               if (!Nrst)
+                       pc <= 32'h0;
+               else if (stall) /* don't change any internal state */
+                       pc <= prevpc;
+               else if (jmp)
+                       pc <= jmppc;
+               else
+                       pc <= prevpc + 32'h4;
+       
+       assign bubble = stall | rd_wait;
+       assign rd_addr = pc;
+       assign rd_req = !stall;
+       assign insn = rd_data;
+                       
+       always @(posedge clk)
+               prevpc <= pc;
+endmodule
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