+/* smram-ich2.c
+ * SMRAM access utility for ICH2 chipset
+ * NetWatch system management mode administration console
+ *
+ * Copyright (c) 2008 Jacob Potter and Joshua Wise. All rights reserved.
+ * This program is free software; you can redistribute and/or modify it under
+ * the terms found in the file LICENSE in the root of this source tree.
+ *
+ */
+
+
#include "reg-82815.h"
+#include <pci.h>
+#include <smram.h>
-unsigned long memsz[] = {
+static unsigned long memsz[] = {
0, // 0
32*1024*1024, // 1
32*1024*1024, // 2
512*1024*1024 // F
};
-#ifdef __linux__
+unsigned int smram_tseg_length(void) {
+ unsigned char smramc;
+ int usmm;
+
+ smramc = pci_read8(0, 0, 0, SMRAMC);
+
+ usmm = (smramc >> 4) & 0x3;
+
+ switch (usmm)
+ {
+ case 0:
+ return 0;
+ case 1:
+ return 0;
+ case 2:
+ return 512 * 1024;
+ case 3:
+ return 1024 * 1024;
+ }
+ return 0;
+}
+
+void * smram_tseg_start(void) {
+ unsigned char drp, drp2;
+ unsigned int tom = 0;
+
+ drp = pci_read8(0, 0, 0, DRP);
+ drp2 = pci_read8(0, 0, 0, DRP2);
+
+ tom += memsz[drp & 0xF];
+ tom += memsz[drp >> 4];
+ tom += memsz[drp2 & 0xF];
+
+ return (void *)(tom - smram_tseg_length());
+}
+
+#ifndef __RAW__
void smram_aseg_dump(void) {
}
#endif
+int smram_locked()
+{
+ unsigned char smramc = pci_read8(0, 0, 0, SMRAMC);
+
+ return (smramc & SMRAMC_LOCK) ? 1 : 0;
+}
+
+smram_state_t smram_save_state()
+{
+ return pci_read8(0, 0, 0, SMRAMC);
+}
+
+void smram_restore_state(smram_state_t state)
+{
+ pci_write8(0, 0, 0, SMRAMC, state);
+}
+
int smram_aseg_set_state (int open) {
unsigned char smramc;
+
+ if (smram_locked())
+ return -1;
+
smramc = pci_read8(0, 0, 0, SMRAMC);
- if (smramc & SMRAMC_LOCK)
+ switch (open)
{
- /* SMRAM is locked; can't load anything. */
- return 1;
- }
-
- if (open) {
- /* Set LSMM to 01 (ABseg = system RAM) */
+ case SMRAM_ASEG_CLOSED:
+ smramc = (smramc & 0xF0) | 0x00;
+ break;
+ case SMRAM_ASEG_OPEN:
smramc = (smramc & 0xF0) | 0x04;
- } else {
- /* Set LSMM to 11 (ABseg = SMM RAM) */
+ break;
+ case SMRAM_ASEG_SMMCODE:
+ smramc = (smramc & 0xF0) | 0x08;
+ break;
+ case SMRAM_ASEG_SMMONLY:
smramc = (smramc & 0xF0) | 0x0C;
+ break;
+ default:
+ return -1;
+ }
+
+ pci_write8(0, 0, 0, SMRAMC, smramc);
+
+ return 0;
+}
+
+int smram_tseg_set_state (int open) {
+ unsigned char smramc;
+
+ if (smram_locked())
+ return -1;
+
+ smramc = pci_read8(0, 0, 0, SMRAMC);
+
+ switch (open)
+ {
+ case SMRAM_TSEG_OPEN:
+ smramc = (smramc & 0x8F) | 0x00;
+ break;
+ default:
+ return -1;
}
- pci_write8(0, 0, 0, SMRAMC);
+ pci_write8(0, 0, 0, SMRAMC, smramc);
return 0;
}