+/* smi.c
+ * System management interrupt dispatch routines for ICH2 southbridge
+ * NetWatch system management mode administration console
+ *
+ * Copyright (c) 2008 Jacob Potter and Joshua Wise. All rights reserved.
+ * This program is free software; you can redistribute and/or modify it under
+ * the terms found in the file LICENSE in the root of this source tree.
+ *
+ */
+
+
#include <smi.h>
#include <pci.h>
#include <io.h>
{
unsigned short smi_en = _get_PMBASE() + ICH2_PMBASE_SMI_EN;
outl(smi_en, inl(smi_en) & ~ICH2_SMI_EN_GBL_SMI_EN);
+
+ /* Try really hard to shut up USB_LEGKEY. */
+ pci_write16(ICH2_USB0_BUS, ICH2_USB0_DEV, ICH2_USB0_FN, ICH2_USB_LEGKEY, 0x0);
+ pci_write16(ICH2_USB0_BUS, ICH2_USB0_DEV, ICH2_USB0_FN, ICH2_USB_LEGKEY,
+ pci_read16(ICH2_USB0_BUS, ICH2_USB0_DEV, ICH2_USB0_FN, ICH2_USB_LEGKEY));
+ pci_write16(ICH2_USB1_BUS, ICH2_USB1_DEV, ICH2_USB1_FN, ICH2_USB_LEGKEY, 0x0);
+ pci_write16(ICH2_USB1_BUS, ICH2_USB1_DEV, ICH2_USB1_FN, ICH2_USB_LEGKEY,
+ pci_read16(ICH2_USB1_BUS, ICH2_USB1_DEV, ICH2_USB1_FN, ICH2_USB_LEGKEY));
+
}
void smi_enable()
if (sts & ICH2_SMI_STS_BIOS_STS)
{
- output("Unhandled: BIOS_STS");
+ if (_handlers[SMI_EVENT_GBL_RLS] == SMI_HANDLER_NONE)
+ output("Unhandled: BIOS_STS");
+ else if (_handlers[SMI_EVENT_GBL_RLS] != SMI_HANDLER_IGNORE)
+ _handlers[SMI_EVENT_GBL_RLS](SMI_EVENT_GBL_RLS);
outl(_get_PMBASE() + ICH2_PMBASE_SMI_STS, ICH2_SMI_STS_BIOS_STS);
}
if (pm1_sts & ICH2_PM1_STS_PWRBTN_STS)
{
- output("Unhandled: PM1_STS: PWRBTN_STS");
+ if (_handlers[SMI_EVENT_PWRBTN] == SMI_HANDLER_NONE)
+ output("Unhandled: PM1_STS: PWRBTN_STS");
+ else if (_handlers[SMI_EVENT_FAST_TIMER] != SMI_HANDLER_IGNORE)
+ _handlers[SMI_EVENT_PWRBTN](SMI_EVENT_PWRBTN);
outw(_get_PMBASE() + ICH2_PMBASE_PM1_STS, ICH2_PM1_STS_PWRBTN_STS);
}
inl(_get_PMBASE() + ICH2_PMBASE_DEVTRAP_EN) |
ICH2_DEVTRAP_EN_KBC_TRP_EN);
return 0;
+ case SMI_EVENT_GBL_RLS:
+ outl(_get_PMBASE() + ICH2_PMBASE_SMI_EN,
+ inl(_get_PMBASE() + ICH2_PMBASE_SMI_EN) |
+ ICH2_SMI_EN_BIOS_EN);
+ return 0;
+ case SMI_EVENT_PWRBTN:
+ outl(_get_PMBASE() + ICH2_PMBASE_PM1_EN,
+ inl(_get_PMBASE() + ICH2_PMBASE_PM1_EN) |
+ ICH2_PM1_EN_PWRBTN_EN);
+ return 0;
default:
return -1;
}
inl(_get_PMBASE() + ICH2_PMBASE_DEVTRAP_EN) &
~ICH2_DEVTRAP_EN_KBC_TRP_EN);
return 0;
+ case SMI_EVENT_GBL_RLS:
+ outl(_get_PMBASE() + ICH2_PMBASE_SMI_EN,
+ inl(_get_PMBASE() + ICH2_PMBASE_SMI_EN) &
+ ~ICH2_SMI_EN_BIOS_EN);
+ return 0;
+ case SMI_EVENT_PWRBTN:
+ outl(_get_PMBASE() + ICH2_PMBASE_PM1_EN,
+ inl(_get_PMBASE() + ICH2_PMBASE_PM1_EN) &
+ ~ICH2_PM1_EN_PWRBTN_EN);
+ return 0;
default:
return -1;
}