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[netwatch.git] / ich2 / smram-ich2.c

diff --git a/ich2/smram-ich2.c b/ich2/smram-ich2.c
index 20c2b8ac6b301b49a8ccd6cb3569996112c54490..efc79e6d1258776195d2b84e0d10b60a7d8c3a01 100644 (file)
--- a/ich2/smram-ich2.c
+++ b/ich2/smram-ich2.c
@@ -2,8 +2,6 @@
 #include <pci.h>
 #include <smram.h>
 
-#ifdef __linux__
-
 static unsigned long memsz[] = {
        0,                      // 0
        32*1024*1024,           // 1
@@ -23,6 +21,44 @@ static unsigned long memsz[] = {
        512*1024*1024           // F
 };
 
+unsigned int smram_tseg_length(void) {
+       unsigned char smramc;
+       int usmm;
+
+       smramc = pci_read8(0, 0, 0, SMRAMC);
+
+       usmm = (smramc >> 4) & 0x3;
+
+       switch (usmm)
+       {
+       case 0:
+               return 0;
+       case 1:
+               return 0;
+       case 2:
+               return 512 * 1024;
+       case 3:
+               return 1024 * 1024;
+       }
+       return 0;
+}
+       
+void * smram_tseg_start(void) {
+       unsigned char drp, drp2;
+       unsigned int tom = 0;
+
+       drp = pci_read8(0, 0, 0, DRP);
+       drp2 = pci_read8(0, 0, 0, DRP2);
+
+       tom += memsz[drp & 0xF];
+       tom += memsz[drp >> 4];
+       tom += memsz[drp2 & 0xF];
+
+       return (void *)(tom - smram_tseg_length());
+}
+
+#ifndef __RAW__
+
 void smram_aseg_dump(void) {
 
        unsigned char smramc, drp, drp2;
@@ -94,7 +130,7 @@ smram_state_t smram_save_state()
 
 void smram_restore_state(smram_state_t state)
 {
-       return pci_write8(0, 0, 0, SMRAMC, state); 
+       pci_write8(0, 0, 0, SMRAMC, state); 
 }
 
 int smram_aseg_set_state (int open) {
@@ -127,3 +163,25 @@ int smram_aseg_set_state (int open) {
 
        return 0;
 }
+
+int smram_tseg_set_state (int open) {
+       unsigned char smramc;
+
+       if (smram_locked())
+               return -1;
+               
+       smramc = pci_read8(0, 0, 0, SMRAMC);
+
+       switch (open)
+       {
+       case SMRAM_TSEG_OPEN:
+               smramc = (smramc & 0x8F) | 0x00;
+               break;
+       default:
+               return -1;
+       }
+
+       pci_write8(0, 0, 0, SMRAMC, smramc);
+
+       return 0;
+}