First pass of 410watch UI code.

[netwatch.git] / include / reg-82801b.h

diff --git a/include/reg-82801b.h b/include/reg-82801b.h
index ee24c0e20c33b86dd6b39ce6ed697b03e2085b71..3192228003a732e077a1d15d0f0738101795738b 100644 (file)
--- a/include/reg-82801b.h
+++ b/include/reg-82801b.h
@@ -1,3 +1,13 @@
+/* reg-82801b.h
+ * Register macros for Intel 82801B
+ * NetWatch system management mode administration console
+ *
+ * Copyright (c) 2008 Jacob Potter and Joshua Wise.  All rights reserved.
+ * This program is free software; you can redistribute and/or modify it under
+ * the terms found in the file LICENSE in the root of this source tree.
+ *
+ */
+

 #ifndef _REG_82801B_H
 #define _REG_82801B_H
 
 #ifndef _REG_82801B_H
 #define _REG_82801B_H
 


@@ -29,6 +39,24 @@
 #define ICH2_LPC_PCI_MON7_TRP_RNG      0xCA
 #define ICH2_LPC_PCI_MON_TRP_MSK       0xCC
 
 #define ICH2_LPC_PCI_MON7_TRP_RNG      0xCA
 #define ICH2_LPC_PCI_MON_TRP_MSK       0xCC
 

+#define ICH2_PMBASE_PM1_STS            0x00
+#define ICH2_PM1_STS_WAK_STS           (1 << 15)
+#define ICH2_PM1_STS_PRBTNOR_STS       (1 << 11)
+#define ICH2_PM1_STS_RTC_STS           (1 << 10)
+#define ICH2_PM1_STS_PWRBTN_STS                (1 << 8)
+#define ICH2_PM1_STS_GBL_STS           (1 << 5)
+#define ICH2_PM1_STS_BM_STS            (1 << 4)
+#define ICH2_PM1_STS_TMROF_STS         (1 << 0)
+
+#define ICH2_PMBASE_PM1_EN             0x02
+#define ICH2_PM1_EN_RTC_EN             (1 << 10)
+#define ICH2_PM1_EN_PWRBTN_EN          (1 << 8)
+#define ICH2_PM1_EN_GBL_EN             (1 << 5)
+#define ICH2_PM1_EN_TMROF_EN           (1 << 0
+
+#define ICH2_PMBASE_PM1_TMR            0x08
+#define ICH2_PM1_TMR_FREQ              3579545         /* This will be the encryption key for a question on the test. */
+

 #define ICH2_PMBASE_SMI_EN             0x30
 #define ICH2_SMI_EN_PERIODIC_EN                (1 << 14)
 #define ICH2_SMI_EN_TCO_EN             (1 << 13)
 #define ICH2_PMBASE_SMI_EN             0x30
 #define ICH2_SMI_EN_PERIODIC_EN                (1 << 14)
 #define ICH2_SMI_EN_TCO_EN             (1 << 13)