#include <pci-bother.h>
#include <minilib.h>
#include <output.h>
+#include <paging.h>
#define XCVR_MAGIC (0x5A00)
/** any single transmission fails after 16 collisions or other errors
** this is the number of times to retry the transmission -- this should
** be plenty
**/
-#define XMIT_RETRIES 1
+#define XMIT_RETRIES 5
/*** Register definitions for the 3c905 ***/
enum Registers
{
unsigned int DnNextPtr;
unsigned int FrameStartHeader;
- unsigned int HdrAddr;
- unsigned int HdrLength;
- unsigned int DataAddr;
- unsigned int DataLength;
+ struct {
+ unsigned int addr;
+ unsigned int len;
+ } __attribute ((aligned(8))) segments[64];
}
TXD __attribute__ ((aligned(8))); /* 64-bit aligned for bus mastering */
*** pkt - the pointer to the packet data itself.
***/
static void
-a3c90x_transmit(const char *dest_addr, unsigned int proto,
- unsigned int size, const char *pkt)
+a3c90x_transmit(struct pbuf *p)
{
- struct eth_hdr
- {
- unsigned char dst_addr[ETH_ALEN];
- unsigned char src_addr[ETH_ALEN];
- unsigned short type;
- } hdr;
-
unsigned char status;
- unsigned int i, retries;
+ static unsigned int stillwaiting = 0;
+ unsigned int n, len;
- for (retries=0; retries < XMIT_RETRIES; retries++)
+ _issue_command(INF_3C90X.IOAddr, cmdStallCtl, 2 /* Stall download */);
+
+ /** Setup the DPD (download descriptor) **/
+ INF_3C90X.TransmitDPD.DnNextPtr = 0;
+ len = 0;
+ n = 0;
+ for (; p; p = p->next)
{
- if (retries != 0)
- outputf("3c90x: retrying packet send (%d)", retries);
-
- /** Stall the download engine **/
- outputf("3c90x: stalling transmit engine");
- _issue_command(INF_3C90X.IOAddr, cmdStallCtl, 2 /* Stall download */);
-
- hdr.type = htons(proto);
- memcpy(hdr.dst_addr, dest_addr, ETH_ALEN);
- memcpy(hdr.src_addr, INF_3C90X.HWAddr, ETH_ALEN);
-
- /** Setup the DPD (download descriptor) **/
- INF_3C90X.TransmitDPD.DnNextPtr = 0;
- /** set notification for transmission completion (bit 15) **/
- INF_3C90X.TransmitDPD.FrameStartHeader = (size + sizeof(hdr)) | 0x8000;
- INF_3C90X.TransmitDPD.HdrAddr = virt_to_bus(&hdr);
- INF_3C90X.TransmitDPD.HdrLength = sizeof(hdr);
- INF_3C90X.TransmitDPD.DataAddr = virt_to_bus(pkt);
- INF_3C90X.TransmitDPD.DataLength = size + (1<<31);
-
- /** Send the packet **/
- outputf("3c90x: pointing card at %08x", virt_to_bus(&(INF_3C90X.TransmitDPD)));
- outl(INF_3C90X.IOAddr + regDnListPtr_l, virt_to_bus(&(INF_3C90X.TransmitDPD)));
-
- outputf("3c90x: unstalling transmit engine");
- _issue_command(INF_3C90X.IOAddr, cmdStallCtl, 3 /* Unstall download */);
+ INF_3C90X.TransmitDPD.segments[n].addr = (unsigned int)p->payload;
+ INF_3C90X.TransmitDPD.segments[n].len = p->len | (p->next ? 0 : (1 << 31));
+ len += p->len;
+ n++;
+ }
+ /** set notification for transmission completion (bit 15) **/
+ INF_3C90X.TransmitDPD.FrameStartHeader = (len) | 0x8000;
+
+ outputf("3c90x: Sending %d byte %d seg packet", len, n);
+
+ /** Send the packet **/
+ outl(INF_3C90X.IOAddr + regDnListPtr_l, v2p(&(INF_3C90X.TransmitDPD)));
+ _issue_command(INF_3C90X.IOAddr, cmdStallCtl, 3 /* Unstall download */);
- outputf("3c90x: waiting for download pointer");
- oneshot_start_ms(100);
- while((inl(INF_3C90X.IOAddr + regDnListPtr_l) != 0) && oneshot_running())
- ;
- if (!oneshot_running())
- {
- outputf("3c90x: Download engine pointer timeout");
- }
+ oneshot_start_ms(10);
+ while((inl(INF_3C90X.IOAddr + regDnListPtr_l) != 0) && oneshot_running())
+ ;
+ if (!oneshot_running())
+ {
+ outputf("3c90x: Download engine pointer timeout");
+ return;
+ }
- outputf("3c90x: waiting for TXCOMPLETE");
- oneshot_start_ms(10); /* Give it 10 ms */
+ oneshot_start_ms(10);
+ stillwaiting = 1;
+ if (stillwaiting)
+ {
while (!(inw(INF_3C90X.IOAddr + regCommandIntStatus_w) & INT_TXCOMPLETE) && oneshot_running())
;
-
if (!(inw(INF_3C90X.IOAddr + regCommandIntStatus_w) & INT_TXCOMPLETE))
{
- outputf("3c90x: tx timeout? stat %02x", inb(INF_3C90X.IOAddr + regTxStatus_b));
- _issue_command(INF_3C90X.IOAddr, cmdTxReset, 0);
- if (! INF_3C90X.isBrev)
- _outb(0x01, INF_3C90X.IOAddr + regTxFreeThresh_b);
- _issue_command(INF_3C90X.IOAddr, cmdTxEnable, 0);
- _issue_command(INF_3C90X.IOAddr, cmdSetInterruptEnable, 0);
- _issue_command(INF_3C90X.IOAddr, cmdSetIndicationEnable, 0x0014);
- _issue_command(INF_3C90X.IOAddr, cmdAcknowledgeInterrupt, 0x661);
- continue;
+ outputf("3c90x: tx timeout? txstat %02x", inb(INF_3C90X.IOAddr + regTxStatus_b));
+ outputf("3c90x: Gen sts %04x", inw(INF_3C90X.IOAddr + regCommandIntStatus_w));
}
status = inb(INF_3C90X.IOAddr + regTxStatus_b);
outb(INF_3C90X.IOAddr + regTxStatus_b, 0x00);
+ stillwaiting = 0;
+ }
- _issue_command(INF_3C90X.IOAddr, cmdAcknowledgeInterrupt, INT_TXCOMPLETE);
-
- /** successful completion (sans "interrupt Requested" bit) **/
- if ((status & 0xbf) == 0x80)
- return;
-
- outputf("3c90x: Status (%hhX)", status);
- /** check error codes **/
- if (status & 0x02)
- {
- outputf("3c90x: Tx Reclaim Error (%hhX)", status);
- a3c90x_reset();
- } else if (status & 0x04) {
- outputf("3c90x: Tx Status Overflow (%hhX)", status);
- for (i=0; i<32; i++)
- _outb(0x00, INF_3C90X.IOAddr + regTxStatus_b);
- /** must re-enable after max collisions before re-issuing tx **/
- _issue_command(INF_3C90X.IOAddr, cmdTxEnable, 0);
- } else if (status & 0x08) {
- outputf("3c90x: Tx Max Collisions (%hhX)", status);
- /** must re-enable after max collisions before re-issuing tx **/
- _issue_command(INF_3C90X.IOAddr, cmdTxEnable, 0);
- } else if (status & 0x10) {
- outputf("3c90x: Tx Underrun (%hhX)", status);
- a3c90x_reset();
- } else if (status & 0x20) {
- outputf("3c90x: Tx Jabber (%hhX)", status);
- a3c90x_reset();
- } else if ((status & 0x80) != 0x80) {
- outputf("3c90x: Internal Error - Incomplete Transmission (%hhX)", status);
- a3c90x_reset();
- }
+#if 0
+ /** successful completion (sans "interrupt Requested" bit) **/
+ if ((status & 0xbf) == 0x80)
+ return;
+
+ outputf("3c90x: Status (%hhX)", status);
+ /** check error codes **/
+ if (status & 0x02)
+ {
+ outputf("3c90x: Tx Reclaim Error (%hhX)", status);
+ a3c90x_reset();
+ } else if (status & 0x04) {
+ outputf("3c90x: Tx Status Overflow (%hhX)", status);
+ for (i=0; i<32; i++)
+ _outb(0x00, INF_3C90X.IOAddr + regTxStatus_b);
+ /** must re-enable after max collisions before re-issuing tx **/
+ _issue_command(INF_3C90X.IOAddr, cmdTxEnable, 0);
+ } else if (status & 0x08) {
+ outputf("3c90x: Tx Max Collisions (%hhX)", status);
+ /** must re-enable after max collisions before re-issuing tx **/
+ _issue_command(INF_3C90X.IOAddr, cmdTxEnable, 0);
+ } else if (status & 0x10) {
+ outputf("3c90x: Tx Underrun (%hhX)", status);
+ a3c90x_reset();
+ } else if (status & 0x20) {
+ outputf("3c90x: Tx Jabber (%hhX)", status);
+ a3c90x_reset();
+ } else if ((status & 0x80) != 0x80) {
+ outputf("3c90x: Internal Error - Incomplete Transmission (%hhX)", status);
+ a3c90x_reset();
}
-
- /** failed after RETRY attempts **/
- outputf("3c90x: Failed to send after %d retries", retries);
- return;
+#endif
}
/** Build the up-load descriptor **/
INF_3C90X.ReceiveUPD.UpNextPtr = 0;
INF_3C90X.ReceiveUPD.UpPktStatus = 0;
- INF_3C90X.ReceiveUPD.DataAddr = virt_to_bus(nic->packet);
+ INF_3C90X.ReceiveUPD.DataAddr = v2p(nic->packet);
INF_3C90X.ReceiveUPD.DataLength = 1536 + (1<<31);
/** Submit the upload descriptor to the NIC **/
- _outl(virt_to_bus(&(INF_3C90X.ReceiveUPD)),
+ _outl(v2p(&(INF_3C90X.ReceiveUPD)),
INF_3C90X.IOAddr + regUpListPtr_l);
/** Wait for upload completion (upComplete(15) or upError (14)) **/
pci_read16(pci->bus, pci->dev, pci->fn, 0xE0) & ~0x3);
outputf("3c90x: Picked I/O address %04x", ioaddr);
-// pci_bother_add(pci);
+ pci_bother_add(pci);
nic.ioaddr = ioaddr & ~3;
nic.irqno = 0;
/* * Set our exported functions **/
nic.poll = a3c90x_poll;
nic.transmit = a3c90x_transmit;
+ memcpy(nic.hwaddr, INF_3C90X.HWAddr, 6);
eth_register(&nic);
return 1;