+/* smi.c
+ * System management interrupt dispatch routines for ICH2 southbridge
+ * NetWatch system management mode administration console
+ *
+ * Copyright (c) 2008 Jacob Potter and Joshua Wise. All rights reserved.
+ * This program is free software; you can redistribute and/or modify it under
+ * the terms found in the file LICENSE in the root of this source tree.
+ *
+ */
+
+
#include <smi.h>
#include <pci.h>
#include <io.h>
if (sts & ICH2_SMI_STS_BIOS_STS)
{
- output("Unhandled: BIOS_STS");
+ if (_handlers[SMI_EVENT_GBL_RLS] == SMI_HANDLER_NONE)
+ output("Unhandled: BIOS_STS");
+ else if (_handlers[SMI_EVENT_GBL_RLS] != SMI_HANDLER_IGNORE)
+ _handlers[SMI_EVENT_GBL_RLS](SMI_EVENT_GBL_RLS);
outl(_get_PMBASE() + ICH2_PMBASE_SMI_STS, ICH2_SMI_STS_BIOS_STS);
}
unsigned short mon_smi = inw(_get_PMBASE() + ICH2_PMBASE_MON_SMI);
unsigned long devact_sts = inl(_get_PMBASE() + ICH2_PMBASE_DEVACT_STS);
unsigned long devtrap_en = inl(_get_PMBASE() + ICH2_PMBASE_DEVTRAP_EN);
+
+ if (devact_sts & ICH2_DEVACT_STS_KBC_ACT_STS)
+ {
+ if (_handlers[SMI_EVENT_DEVTRAP_KBC] == SMI_HANDLER_NONE)
+ output("Unhandled: DEVACT_KBC_ACT_STS");
+ else if (_handlers[SMI_EVENT_DEVTRAP_KBC] != SMI_HANDLER_IGNORE)
+ _handlers[SMI_EVENT_DEVTRAP_KBC](SMI_EVENT_DEVTRAP_KBC);
+ outl(_get_PMBASE() + ICH2_PMBASE_DEVACT_STS, ICH2_DEVACT_STS_KBC_ACT_STS);
+ }
+
+ /* Refresh register cache so that we can print unhandleds as needed. */
+ mon_smi = inw(_get_PMBASE() + ICH2_PMBASE_MON_SMI);
+ devact_sts = inl(_get_PMBASE() + ICH2_PMBASE_DEVACT_STS);
+ devtrap_en = inl(_get_PMBASE() + ICH2_PMBASE_DEVTRAP_EN);
+
if (((mon_smi & 0x0F00) >> 8) & ((mon_smi & 0xF000) >> 12))
outputf("Unhandled: MON_SMI (%04x)", mon_smi);
if (devact_sts & devtrap_en)
inl(_get_PMBASE() + ICH2_PMBASE_SMI_EN) |
ICH2_SMI_EN_SWSMI_TMR_EN);
return 0;
+ case SMI_EVENT_DEVTRAP_KBC:
+ outl(_get_PMBASE() + ICH2_PMBASE_DEVTRAP_EN,
+ inl(_get_PMBASE() + ICH2_PMBASE_DEVTRAP_EN) |
+ ICH2_DEVTRAP_EN_KBC_TRP_EN);
+ return 0;
+ case SMI_EVENT_GBL_RLS:
+ outl(_get_PMBASE() + ICH2_PMBASE_SMI_EN,
+ inl(_get_PMBASE() + ICH2_PMBASE_SMI_EN) |
+ ICH2_SMI_EN_BIOS_EN);
+ return 0;
default:
return -1;
}
inl(_get_PMBASE() + ICH2_PMBASE_SMI_EN) &
~ICH2_SMI_EN_SWSMI_TMR_EN);
return 0;
+ case SMI_EVENT_DEVTRAP_KBC:
+ outl(_get_PMBASE() + ICH2_PMBASE_DEVTRAP_EN,
+ inl(_get_PMBASE() + ICH2_PMBASE_DEVTRAP_EN) &
+ ~ICH2_DEVTRAP_EN_KBC_TRP_EN);
+ return 0;
+ case SMI_EVENT_GBL_RLS:
+ outl(_get_PMBASE() + ICH2_PMBASE_SMI_EN,
+ inl(_get_PMBASE() + ICH2_PMBASE_SMI_EN) &
+ ~ICH2_SMI_EN_BIOS_EN);
+ return 0;
default:
return -1;
}