Add gbl_rls handler

[netwatch.git] / ich2 / smi.c

diff --git a/ich2/smi.c b/ich2/smi.c
index d255615fbc9439db215e659f613a437e84759c70..7f9642183812738f5a4edb83e61fb972cc9057dd 100644 (file)
--- a/ich2/smi.c
+++ b/ich2/smi.c
@@ -42,7 +42,10 @@ void smi_poll()
        
        if (sts & ICH2_SMI_STS_BIOS_STS)
        {
        
        if (sts & ICH2_SMI_STS_BIOS_STS)
        {

-               output("Unhandled: BIOS_STS");
+               if (_handlers[SMI_EVENT_GBL_RLS] == SMI_HANDLER_NONE)
+                       output("Unhandled: BIOS_STS");
+               else if (_handlers[SMI_EVENT_GBL_RLS] != SMI_HANDLER_IGNORE)
+                       _handlers[SMI_EVENT_GBL_RLS](SMI_EVENT_GBL_RLS);

                outl(_get_PMBASE() + ICH2_PMBASE_SMI_STS, ICH2_SMI_STS_BIOS_STS);
        }
        
                outl(_get_PMBASE() + ICH2_PMBASE_SMI_STS, ICH2_SMI_STS_BIOS_STS);
        }
        


@@ -129,6 +132,21 @@ void smi_poll()
                unsigned short mon_smi = inw(_get_PMBASE() + ICH2_PMBASE_MON_SMI);
                unsigned long devact_sts = inl(_get_PMBASE() + ICH2_PMBASE_DEVACT_STS);
                unsigned long devtrap_en = inl(_get_PMBASE() + ICH2_PMBASE_DEVTRAP_EN);
                unsigned short mon_smi = inw(_get_PMBASE() + ICH2_PMBASE_MON_SMI);
                unsigned long devact_sts = inl(_get_PMBASE() + ICH2_PMBASE_DEVACT_STS);
                unsigned long devtrap_en = inl(_get_PMBASE() + ICH2_PMBASE_DEVTRAP_EN);

+               
+               if (devact_sts & ICH2_DEVACT_STS_KBC_ACT_STS)
+               {
+                       if (_handlers[SMI_EVENT_DEVTRAP_KBC] == SMI_HANDLER_NONE)
+                               output("Unhandled: DEVACT_KBC_ACT_STS");
+                       else if (_handlers[SMI_EVENT_DEVTRAP_KBC] != SMI_HANDLER_IGNORE)
+                               _handlers[SMI_EVENT_DEVTRAP_KBC](SMI_EVENT_DEVTRAP_KBC);
+                       outl(_get_PMBASE() + ICH2_PMBASE_DEVACT_STS, ICH2_DEVACT_STS_KBC_ACT_STS);
+               }
+               
+               /* Refresh register cache so that we can print unhandleds as needed. */
+               mon_smi = inw(_get_PMBASE() + ICH2_PMBASE_MON_SMI);
+               devact_sts = inl(_get_PMBASE() + ICH2_PMBASE_DEVACT_STS);
+               devtrap_en = inl(_get_PMBASE() + ICH2_PMBASE_DEVTRAP_EN);
+               

                if (((mon_smi & 0x0F00) >> 8) & ((mon_smi & 0xF000) >> 12))
                        outputf("Unhandled: MON_SMI (%04x)", mon_smi);
                if (devact_sts & devtrap_en)
                if (((mon_smi & 0x0F00) >> 8) & ((mon_smi & 0xF000) >> 12))
                        outputf("Unhandled: MON_SMI (%04x)", mon_smi);
                if (devact_sts & devtrap_en)


@@ -185,6 +203,16 @@ int smi_enable_event(smi_event_t ev)
                        inl(_get_PMBASE() + ICH2_PMBASE_SMI_EN) |
                                ICH2_SMI_EN_SWSMI_TMR_EN);
                return 0;
                        inl(_get_PMBASE() + ICH2_PMBASE_SMI_EN) |
                                ICH2_SMI_EN_SWSMI_TMR_EN);
                return 0;

+       case SMI_EVENT_DEVTRAP_KBC:
+               outl(_get_PMBASE() + ICH2_PMBASE_DEVTRAP_EN,
+                       inl(_get_PMBASE() + ICH2_PMBASE_DEVTRAP_EN) |
+                               ICH2_DEVTRAP_EN_KBC_TRP_EN);
+               return 0;
+       case SMI_EVENT_GBL_RLS:
+               outl(_get_PMBASE() + ICH2_PMBASE_SMI_EN,
+                       inl(_get_PMBASE() + ICH2_PMBASE_SMI_EN) |
+                               ICH2_SMI_EN_BIOS_EN);
+               return 0;

        default:
                return -1;
        }
        default:
                return -1;
        }


@@ -199,6 +227,16 @@ int smi_disable_event(smi_event_t ev)
                        inl(_get_PMBASE() + ICH2_PMBASE_SMI_EN) &
                                ~ICH2_SMI_EN_SWSMI_TMR_EN);
                return 0;
                        inl(_get_PMBASE() + ICH2_PMBASE_SMI_EN) &
                                ~ICH2_SMI_EN_SWSMI_TMR_EN);
                return 0;

+       case SMI_EVENT_DEVTRAP_KBC:
+               outl(_get_PMBASE() + ICH2_PMBASE_DEVTRAP_EN,
+                       inl(_get_PMBASE() + ICH2_PMBASE_DEVTRAP_EN) &
+                               ~ICH2_DEVTRAP_EN_KBC_TRP_EN);
+               return 0;
+       case SMI_EVENT_GBL_RLS:
+               outl(_get_PMBASE() + ICH2_PMBASE_SMI_EN,
+                       inl(_get_PMBASE() + ICH2_PMBASE_SMI_EN) &
+                               ~ICH2_SMI_EN_BIOS_EN);
+               return 0;

        default:
                return -1;
        }
        default:
                return -1;
        }