git.joshuawise.com / netwatch.git / blame_incremental
| Commit | Line | Data |
|---|---|---|
| 1 | #ifndef _MSR_H | |
| 2 | #define _MSR_H | |
| 3 | ||
| 4 | #define WRMSR(ad, da) \ | |
| 5 | do { \ | |
| 6 | unsigned long __a = (ad); \ | |
| 7 | unsigned long long __d = (da); \ | |
| 8 | asm volatile("wrmsr" : : "c" (__a), "A" (__d)); \ | |
| 9 | } while (0) | |
| 10 | #define RDMSR(ad) \ | |
| 11 | ({ \ | |
| 12 | unsigned long __a = (ad); \ | |
| 13 | unsigned long long __d; \ | |
| 14 | asm volatile("rdmsr" : "=A" (__d) : "c" (__a)); \ | |
| 15 | __d; \ | |
| 16 | }) | |
| 17 | ||
| 18 | #endif |