]> Joshua Wise's Git repositories - netwatch.git/blame_incremental - netwatch/smi.c
Fix width to 8, not 9.
[netwatch.git] / netwatch / smi.c
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CommitLineData
1#include <io.h>
2#include <smram.h>
3#include <video_defines.h>
4#include <minilib.h>
5#include <smi.h>
6#include <pci-bother.h>
7#include <serial.h>
8#include <fb.h>
9#include <output.h>
10#include <msr.h>
11#include "../net/net.h"
12#include "vga-overlay.h"
13
14unsigned int counter = 0;
15unsigned long pcisave = 0;
16unsigned char vgasave = 0;
17
18void smi_entry(void)
19{
20 char statstr[512];
21
22 /* Reenable caching on SMRAM. */
23 WRMSR(0x202, (RDMSR(0x202) & ~(0xFFULL)) | 0x06ULL);
24
25 pcisave = inl(0xCF8);
26 vgasave = inb(0x3D4);
27 pci_unbother_all();
28
29 serial_init();
30
31 if (fb)
32 fb->getvmode(fb->priv);
33
34 counter++;
35 if (!fb || fb->curmode.text)
36 {
37 sprintf(statstr, "NetWatch! %08x %08x", smi_status(), counter);
38 strblit(statstr, 0, 0, 0);
39 }
40
41 eth_poll();
42
43 if (inl(0x840) & 0x1000)
44 {
45 /*
46 pci_dump();
47 */
48 outl(0x840, 0x1100);
49 outl(0x840, 0x0100);
50 }
51
52
53 smi_poll();
54
55 pci_bother_all();
56 outl(0xCF8, pcisave);
57 outb(0x3D4, vgasave);
58
59 /* Disable caching on SMRAM again, to prevent the user from whacking us. */
60 WRMSR(0x202, RDMSR(0x202) & ~(0xFFULL));
61}
62
63extern void timer_handler(smi_event_t ev);
64extern void kbc_handler(smi_event_t ev);
65extern void gbl_rls_handler(smi_event_t ev);
66
67void __firstrun_stub() {
68
69 /* Try really hard to shut up USB_LEGKEY. */
70 pci_write16(0, 31, 2, 0xC0, pci_read16(0, 31, 2, 0xC0));
71 pci_write16(0, 31, 2, 0xC0, 0);
72 pci_write16(0, 31, 4, 0xC0, pci_read16(0, 31, 4, 0xC0));
73 pci_write16(0, 31, 4, 0xC0, 0);
74
75 /* Turn on the SMIs we want */
76 smi_disable();
77
78 smi_register_handler(SMI_EVENT_FAST_TIMER, timer_handler);
79 smi_enable_event(SMI_EVENT_FAST_TIMER);
80
81 smi_register_handler(SMI_EVENT_DEVTRAP_KBC, kbc_handler);
82 smi_enable_event(SMI_EVENT_DEVTRAP_KBC);
83
84 smi_register_handler(SMI_EVENT_GBL_RLS, gbl_rls_handler);
85 smi_enable_event(SMI_EVENT_GBL_RLS);
86
87 smi_enable();
88}
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