git.joshuawise.com / netwatch.git / blame
| Commit | Line | Data |
|---|---|---|
| f1584bb0 JW |
1 | /* msr.h |
| 2 | * Macros to read and write model specific registers | |
| 3 | * NetWatch system management mode administration console | |
| 4 | * | |
| 5 | * Copyright (c) 2008 Jacob Potter and Joshua Wise. All rights reserved. | |
| 6 | * This program is free software; you can redistribute and/or modify it under | |
| 7 | * the terms found in the file LICENSE in the root of this source tree. | |
| 8 | * | |
| 9 | */ | |
| 10 | ||
| eda689ee JW |
11 | #ifndef _MSR_H |
| 12 | #define _MSR_H | |
| 13 | ||
| 14 | #define WRMSR(ad, da) \ | |
| 15 | do { \ | |
| 16 | unsigned long __a = (ad); \ | |
| 17 | unsigned long long __d = (da); \ | |
| 18 | asm volatile("wrmsr" : : "c" (__a), "A" (__d)); \ | |
| 19 | } while (0) | |
| 20 | #define RDMSR(ad) \ | |
| 21 | ({ \ | |
| 22 | unsigned long __a = (ad); \ | |
| 23 | unsigned long long __d; \ | |
| 24 | asm volatile("rdmsr" : "=A" (__d) : "c" (__a)); \ | |
| 25 | __d; \ | |
| 26 | }) | |
| 27 | ||
| 28 | #endif |