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Commit | Line | Data |
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3c4e084d JP |
1 | /* smi.c |
2 | * First-run SMI C entry point | |
3 | * NetWatch system management mode administration console | |
4 | * | |
5 | * Copyright (c) 2008 Jacob Potter and Joshua Wise. All rights reserved. | |
6 | * This program is free software; you can redistribute and/or modify it under | |
7 | * the terms found in the file LICENSE in the root of this source tree. | |
8 | * | |
9 | */ | |
10 | ||
9e2a82e4 JP |
11 | #include <io.h> |
12 | #include <smram.h> | |
13 | #include <video_defines.h> | |
14 | #include <minilib.h> | |
15 | #include <smi.h> | |
16 | #include <pci-bother.h> | |
113df320 | 17 | #include <serial.h> |
c77a83d6 JW |
18 | #include <fb.h> |
19 | #include <output.h> | |
eda689ee | 20 | #include <msr.h> |
9e2a82e4 JP |
21 | #include "../net/net.h" |
22 | #include "vga-overlay.h" | |
23 | ||
9e2a82e4 | 24 | unsigned int counter = 0; |
9e2a82e4 JP |
25 | unsigned long pcisave = 0; |
26 | unsigned char vgasave = 0; | |
27 | ||
93e304e3 JW |
28 | unsigned long lastentry = 0; |
29 | unsigned long lastlength = 0; | |
30 | ||
31 | unsigned long rdtsc() | |
32 | { | |
33 | unsigned long tsc; | |
34 | asm volatile ("mov %%cr4, %%eax;" | |
35 | "and $~2, %%eax;" | |
36 | "mov %%eax, %%cr4;" | |
37 | "rdtsc" : "=a"(tsc) : : "edx"); | |
38 | return tsc; | |
39 | } | |
40 | ||
9e2a82e4 JP |
41 | void smi_entry(void) |
42 | { | |
43 | char statstr[512]; | |
93e304e3 | 44 | unsigned long entrytime; |
68beefa8 | 45 | |
eda689ee JW |
46 | /* Reenable caching on SMRAM. */ |
47 | WRMSR(0x202, (RDMSR(0x202) & ~(0xFFULL)) | 0x06ULL); | |
48 | ||
93e304e3 JW |
49 | entrytime = rdtsc(); |
50 | ||
9e2a82e4 JP |
51 | pcisave = inl(0xCF8); |
52 | vgasave = inb(0x3D4); | |
9e2a82e4 | 53 | pci_unbother_all(); |
c77a83d6 JW |
54 | |
55 | serial_init(); | |
93e304e3 | 56 | |
c77a83d6 JW |
57 | if (fb) |
58 | fb->getvmode(fb->priv); | |
68beefa8 | 59 | |
9e2a82e4 | 60 | counter++; |
5cb80fe1 JW |
61 | if (!fb || fb->curmode.text) |
62 | { | |
93e304e3 JW |
63 | int totcyc, pct; |
64 | ||
65 | if (entrytime < lastentry) | |
66 | totcyc = entrytime + (0xFFFFFFFFUL - lastentry) + 1; | |
67 | else | |
68 | totcyc = entrytime - lastentry; | |
69 | if (totcyc == 0) | |
70 | totcyc = 1; /* argh */ | |
71 | totcyc /= 1000; | |
72 | if (totcyc == 0) | |
73 | totcyc = 1; | |
74 | ||
75 | pct = lastlength / totcyc; | |
76 | ||
77 | sprintf(statstr, "NetWatch! %08x %08x, %2d.%d%%", smi_status(), counter, pct/10, pct%10); | |
5cb80fe1 JW |
78 | strblit(statstr, 0, 0, 0); |
79 | } | |
9e2a82e4 | 80 | |
9e2a82e4 | 81 | eth_poll(); |
9e2a82e4 JP |
82 | |
83 | if (inl(0x840) & 0x1000) | |
84 | { | |
85 | /* | |
86 | pci_dump(); | |
87 | */ | |
88 | outl(0x840, 0x1100); | |
89 | outl(0x840, 0x0100); | |
90 | } | |
91 | ||
113df320 | 92 | |
9e2a82e4 | 93 | smi_poll(); |
68beefa8 | 94 | |
9e2a82e4 | 95 | pci_bother_all(); |
9e2a82e4 JP |
96 | outl(0xCF8, pcisave); |
97 | outb(0x3D4, vgasave); | |
eda689ee | 98 | |
93e304e3 JW |
99 | lastentry = entrytime; |
100 | entrytime = rdtsc(); | |
101 | if (entrytime < lastentry) | |
102 | lastlength = entrytime + (0xFFFFFFFFUL - lastentry) + 1; | |
103 | else | |
104 | lastlength = entrytime - lastentry; | |
105 | ||
eda689ee JW |
106 | /* Disable caching on SMRAM again, to prevent the user from whacking us. */ |
107 | WRMSR(0x202, RDMSR(0x202) & ~(0xFFULL)); | |
9e2a82e4 JP |
108 | } |
109 | ||
722e5aea JP |
110 | extern void timer_handler(smi_event_t ev); |
111 | extern void kbc_handler(smi_event_t ev); | |
112 | extern void gbl_rls_handler(smi_event_t ev); | |
9e2a82e4 | 113 | |
2768393f JW |
114 | void __firstrun_stub() |
115 | { | |
722e5aea JP |
116 | /* Turn on the SMIs we want */ |
117 | smi_disable(); | |
9e2a82e4 JP |
118 | |
119 | smi_register_handler(SMI_EVENT_FAST_TIMER, timer_handler); | |
120 | smi_enable_event(SMI_EVENT_FAST_TIMER); | |
121 | ||
722e5aea JP |
122 | smi_register_handler(SMI_EVENT_DEVTRAP_KBC, kbc_handler); |
123 | smi_enable_event(SMI_EVENT_DEVTRAP_KBC); | |
124 | ||
125 | smi_register_handler(SMI_EVENT_GBL_RLS, gbl_rls_handler); | |
126 | smi_enable_event(SMI_EVENT_GBL_RLS); | |
127 | ||
9e2a82e4 JP |
128 | smi_enable(); |
129 | } |