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Commit | Line | Data |
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3368351a | 1 | /* smram-ich2.c |
f1584bb0 JW |
2 | * SMRAM access utility for ICH2 chipset |
3 | * NetWatch system management mode administration console | |
4 | * | |
5 | * Copyright (c) 2008 Jacob Potter and Joshua Wise. All rights reserved. | |
6 | * This program is free software; you can redistribute and/or modify it under | |
7 | * the terms found in the file LICENSE in the root of this source tree. | |
8 | * | |
9 | */ | |
10 | ||
11 | ||
99970893 | 12 | #include "reg-82815.h" |
81148fa1 JW |
13 | #include <pci.h> |
14 | #include <smram.h> | |
99970893 | 15 | |
81148fa1 | 16 | static unsigned long memsz[] = { |
99970893 JP |
17 | 0, // 0 |
18 | 32*1024*1024, // 1 | |
19 | 32*1024*1024, // 2 | |
20 | 48*1024*1024, // 3 | |
21 | 64*1024*1024, // 4 | |
22 | 64*1024*1024, // 5 | |
23 | 96*1024*1024, // 6 | |
24 | 128*1024*1024, // 7 | |
25 | 128*1024*1024, // 8 | |
26 | 128*1024*1024, // 9 | |
27 | 128*1024*1024, // A | |
28 | 192*1024*1024, // B | |
29 | 256*1024*1024, // C | |
30 | 256*1024*1024, // D | |
31 | 256*1024*1024, // E | |
32 | 512*1024*1024 // F | |
33 | }; | |
34 | ||
2cd64cbf JP |
35 | unsigned int smram_tseg_length(void) { |
36 | unsigned char smramc; | |
37 | int usmm; | |
38 | ||
39 | smramc = pci_read8(0, 0, 0, SMRAMC); | |
40 | ||
41 | usmm = (smramc >> 4) & 0x3; | |
42 | ||
43 | switch (usmm) | |
44 | { | |
45 | case 0: | |
46 | return 0; | |
47 | case 1: | |
48 | return 0; | |
49 | case 2: | |
50 | return 512 * 1024; | |
51 | case 3: | |
52 | return 1024 * 1024; | |
53 | } | |
54 | return 0; | |
55 | } | |
56 | ||
57 | void * smram_tseg_start(void) { | |
58 | unsigned char drp, drp2; | |
59 | unsigned int tom = 0; | |
60 | ||
61 | drp = pci_read8(0, 0, 0, DRP); | |
62 | drp2 = pci_read8(0, 0, 0, DRP2); | |
63 | ||
64 | tom += memsz[drp & 0xF]; | |
65 | tom += memsz[drp >> 4]; | |
66 | tom += memsz[drp2 & 0xF]; | |
67 | ||
68 | return (void *)(tom - smram_tseg_length()); | |
69 | } | |
70 | ||
71 | #ifndef __RAW__ | |
72 | ||
99970893 JP |
73 | void smram_aseg_dump(void) { |
74 | ||
75 | unsigned char smramc, drp, drp2; | |
76 | unsigned int tom = 0; | |
77 | int usmm, lsmm; | |
78 | ||
79 | smramc = pci_read8(0, 0, 0, SMRAMC); | |
80 | drp = pci_read8(0, 0, 0, DRP); | |
81 | drp2 = pci_read8(0, 0, 0, DRP2); | |
82 | ||
83 | printf("SMRAMC: %02x\n", smramc); | |
84 | ||
85 | tom += memsz[drp & 0xF]; | |
86 | tom += memsz[drp >> 4]; | |
87 | tom += memsz[drp2 & 0xF]; | |
88 | ||
89 | printf("Top of DRAM: %08x\n", tom); | |
90 | ||
91 | usmm = (smramc >> 4) & 0x3; | |
92 | lsmm = (smramc >> 2) & 0x3; | |
93 | ||
94 | switch (usmm) | |
95 | { | |
96 | case 0: | |
97 | printf("TSEG and HSEG both off\n"); | |
98 | break; | |
99 | case 1: | |
100 | printf("TSEG off, HSEG %s\n", lsmm ? "off" : "on"); | |
101 | break; | |
102 | case 2: | |
103 | printf("TSEG 512KB (%08x - %08x), HSEG %s\n", | |
104 | tom - 512 * 1024, tom - 1, lsmm ? "off" : "on"); | |
105 | break; | |
106 | case 3: | |
107 | printf("TSEG 1MB (%08x - %08x), HSEG %s\n", | |
108 | tom - 1 * 1024 * 1024, tom - 1, lsmm ? "off" : "on"); | |
109 | break; | |
110 | } | |
111 | ||
112 | switch (lsmm) | |
113 | { | |
114 | case 0: | |
115 | printf("ABSEG disabled\n"); | |
116 | break; | |
117 | case 1: | |
118 | printf("ABSEG enabled as system RAM\n"); | |
119 | break; | |
120 | case 2: | |
121 | printf("ABSEG enabled for SMM code only\n"); | |
122 | break; | |
123 | case 3: | |
124 | printf("ABSEG enabled for both SMM code and data\n"); | |
125 | break; | |
126 | } | |
127 | } | |
128 | #endif | |
129 | ||
81148fa1 JW |
130 | int smram_locked() |
131 | { | |
132 | unsigned char smramc = pci_read8(0, 0, 0, SMRAMC); | |
133 | ||
134 | return (smramc & SMRAMC_LOCK) ? 1 : 0; | |
135 | } | |
136 | ||
137 | smram_state_t smram_save_state() | |
138 | { | |
139 | return pci_read8(0, 0, 0, SMRAMC); | |
140 | } | |
141 | ||
142 | void smram_restore_state(smram_state_t state) | |
143 | { | |
36ce375d | 144 | pci_write8(0, 0, 0, SMRAMC, state); |
81148fa1 JW |
145 | } |
146 | ||
99970893 JP |
147 | int smram_aseg_set_state (int open) { |
148 | unsigned char smramc; | |
81148fa1 JW |
149 | |
150 | if (smram_locked()) | |
151 | return -1; | |
3368351a | 152 | |
99970893 JP |
153 | smramc = pci_read8(0, 0, 0, SMRAMC); |
154 | ||
81148fa1 | 155 | switch (open) |
99970893 | 156 | { |
81148fa1 JW |
157 | case SMRAM_ASEG_CLOSED: |
158 | smramc = (smramc & 0xF0) | 0x00; | |
159 | break; | |
160 | case SMRAM_ASEG_OPEN: | |
99970893 | 161 | smramc = (smramc & 0xF0) | 0x04; |
81148fa1 JW |
162 | break; |
163 | case SMRAM_ASEG_SMMCODE: | |
164 | smramc = (smramc & 0xF0) | 0x08; | |
165 | break; | |
166 | case SMRAM_ASEG_SMMONLY: | |
99970893 | 167 | smramc = (smramc & 0xF0) | 0x0C; |
81148fa1 JW |
168 | break; |
169 | default: | |
170 | return -1; | |
99970893 JP |
171 | } |
172 | ||
81148fa1 | 173 | pci_write8(0, 0, 0, SMRAMC, smramc); |
99970893 JP |
174 | |
175 | return 0; | |
176 | } | |
f2b87dd6 JW |
177 | |
178 | int smram_tseg_set_state (int open) { | |
179 | unsigned char smramc; | |
180 | ||
181 | if (smram_locked()) | |
182 | return -1; | |
183 | ||
184 | smramc = pci_read8(0, 0, 0, SMRAMC); | |
185 | ||
186 | switch (open) | |
187 | { | |
188 | case SMRAM_TSEG_OPEN: | |
189 | smramc = (smramc & 0x8F) | 0x00; | |
190 | break; | |
191 | default: | |
192 | return -1; | |
193 | } | |
194 | ||
195 | pci_write8(0, 0, 0, SMRAMC, smramc); | |
196 | ||
197 | return 0; | |
198 | } |