[netwatch.git] / ich2 / smi.c

#include <smi.h>
#include <pci.h>
#include <io.h>
#include <stdint.h>
#include <vga-overlay.h>
#include <reg-82801b.h>

static uint16_t _get_PMBASE()
{
	static long pmbase = -1;
	
	if (pmbase == -1)	/* Memoize it so that we don't have to hit PCI so often. */
		pmbase = pci_read32(ICH2_LPC_BUS, ICH2_LPC_DEV, ICH2_LPC_FN, ICH2_LPC_PCI_PMBASE) & ICH2_PMBASE_MASK;
	
	return pmbase;
}

void smi_disable()
{
	unsigned short smi_en = _get_PMBASE() + ICH2_PMBASE_SMI_EN;
	outl(smi_en, inl(smi_en) & ~ICH2_SMI_EN_GBL_SMI_EN);
}

void smi_enable()
{
	unsigned short smi_en = _get_PMBASE() + ICH2_PMBASE_SMI_EN;
	outl(smi_en, inl(smi_en) | ICH2_SMI_EN_GBL_SMI_EN);
}

unsigned long smi_status()
{
	unsigned short smi_sts = _get_PMBASE() + ICH2_PMBASE_SMI_STS;
	return inl(smi_sts);
}

void smi_poll()
{
	unsigned long sts = smi_status();
	
	if (sts & ICH2_SMI_STS_BIOS_STS)
	{
		dolog("Unhandled: BIOS_STS");
		outl(_get_PMBASE() + ICH2_PMBASE_SMI_STS, ICH2_SMI_STS_BIOS_STS);
	}
	
	if (sts & ICH2_SMI_STS_LEGACY_USB_STS)
	{
		dolog("Unhandled: LEGACY_USB_STS");
		outl(_get_PMBASE() + ICH2_PMBASE_SMI_STS, ICH2_SMI_STS_LEGACY_USB_STS);
	}
	
	if (sts & ICH2_SMI_STS_SLP_SMI_STS)
	{
		dolog("Unhandled: SLP_SMI_STS");
		outl(_get_PMBASE() + ICH2_PMBASE_SMI_STS, ICH2_SMI_STS_SLP_SMI_STS);
	}
	
	if (sts & ICH2_SMI_STS_APM_STS)
	{
		dolog("Unhandled: APM_STS");
		outl(_get_PMBASE() + ICH2_PMBASE_SMI_STS, ICH2_SMI_STS_APM_STS);
	}
	
	if (sts & ICH2_SMI_STS_SWSMI_TMR_STS)	// Ack it, then request another.
	{
		outl(_get_PMBASE() + ICH2_PMBASE_SMI_STS, ICH2_SMI_STS_SWSMI_TMR_STS);
		outl(_get_PMBASE() + ICH2_PMBASE_SMI_EN,
			inl(_get_PMBASE() + ICH2_PMBASE_SMI_EN) & ~ICH2_SMI_EN_SWSMI_TMR_EN);
		outl(_get_PMBASE() + ICH2_PMBASE_SMI_EN,
			inl(_get_PMBASE() + ICH2_PMBASE_SMI_EN) | ICH2_SMI_EN_SWSMI_TMR_EN);
	}
	
	if (sts & ICH2_SMI_STS_PM1_STS_REG)
	{
		unsigned short pm1_sts = inw(_get_PMBASE() + ICH2_PMBASE_PM1_STS);
		unsigned short pm1_en = inw(_get_PMBASE() + ICH2_PMBASE_PM1_EN);
		
		pm1_sts &= pm1_en;
		if (pm1_sts & ICH2_PM1_STS_RTC_STS)
		{
			dolog("Unhandled: PM1_STS: RTC_STS");
			outw(_get_PMBASE() + ICH2_PMBASE_PM1_STS, ICH2_PM1_STS_RTC_STS);
		}
		
		if (pm1_sts & ICH2_PM1_STS_PWRBTN_STS)
		{
			dolog("Unhandled: PM1_STS: PWRBTN_STS");
			outw(_get_PMBASE() + ICH2_PMBASE_PM1_STS, ICH2_PM1_STS_PWRBTN_STS);
		}
		
		if (pm1_sts & ICH2_PM1_STS_GBL_STS)
		{
			dolog("Unhandled: PM1_STS: GBL_STS");
			outw(_get_PMBASE() + ICH2_PMBASE_PM1_STS, ICH2_PM1_STS_GBL_STS);
		}
		
		if (pm1_sts & ICH2_PM1_STS_TMROF_STS)
		{
			dolog("Unhandled: PM1_STS: TMROF_STS");
			outw(_get_PMBASE() + ICH2_PMBASE_PM1_STS, ICH2_PM1_STS_TMROF_STS);
		}
		
		outl(_get_PMBASE() + ICH2_PMBASE_SMI_STS, ICH2_SMI_STS_PM1_STS_REG);
	}
	
	if (sts & ICH2_SMI_STS_GPE0_STS)
	{
		/* XXX -- trawl through GPE0_STS to see what happened */
		dolog("XXX Unhandled: GPE0_STS (expect lockup)");
	}
	
	if (sts & ICH2_SMI_STS_GPE1_STS)
	{
		/* XXX -- trawl through GPE1_STS to see what happened */
		dolog("XXX Unhandled: GPE1_STS (expect lockup)");
	}
	
	if (sts & ICH2_SMI_STS_MCSMI_STS)
	{
		dolog("Unhandled: MCSMI_STS");
		outl(_get_PMBASE() + ICH2_PMBASE_SMI_STS, ICH2_SMI_STS_MCSMI_STS);
	}
	
	if (sts & ICH2_SMI_STS_DEVMON_STS)
	{
		unsigned short mon_smi = inw(_get_PMBASE() + ICH2_PMBASE_MON_SMI);
		unsigned long devact_sts = inl(_get_PMBASE() + ICH2_PMBASE_DEVACT_STS);
		unsigned long devtrap_en = inl(_get_PMBASE() + ICH2_PMBASE_DEVTRAP_EN);
		if (((mon_smi & 0x0F00) >> 8) & ((mon_smi & 0xF000) >> 12))
			dologf("Unhandled: MON_SMI (%04x)", mon_smi);
		if (devact_sts & devtrap_en)
			dologf("Unhandled: DEVTRAP (%08x)", devact_sts & devtrap_en);
	}
	
	if (sts & ICH2_SMI_STS_TCO_STS)
	{
		dolog("Unhandled: TCO_STS");
		outl(_get_PMBASE() + ICH2_PMBASE_SMI_STS, ICH2_SMI_STS_TCO_STS);
	}
	
	if (sts & ICH2_SMI_STS_PERIODIC_STS)
	{
		dolog("Unhandled: PERIODIC_STS");
		outl(_get_PMBASE() + ICH2_PMBASE_SMI_STS, ICH2_SMI_STS_PERIODIC_STS);
	}
	
	if (sts & ICH2_SMI_STS_SERIRQ_SMI_STS)
	{
		dolog("Unhandled: SERIRQ_SMI_STS");
		outl(_get_PMBASE() + ICH2_PMBASE_SMI_STS, ICH2_SMI_STS_SERIRQ_SMI_STS);
	}
	
	if (sts & ICH2_SMI_STS_SMBUS_SMI_STS)
	{
		dolog("Unhandled: SMBUS_SMI_STS");
		outl(_get_PMBASE() + ICH2_PMBASE_SMI_STS, ICH2_SMI_STS_SMBUS_SMI_STS);
	}
	
	if (smi_status() & ~ICH2_SMI_STS_PM1_STS_REG)	/* Either the chipset is buggy, or we are. */
		dologf("WARN: couldn't clear SMI_STS! (%08x)", smi_status());
	
	outl(_get_PMBASE() + ICH2_PMBASE_SMI_EN,
		inl(_get_PMBASE() + ICH2_PMBASE_SMI_EN) |
			ICH2_SMI_EN_EOS |
			ICH2_SMI_EN_GBL_SMI_EN);
}
Commit	Line	Data
85bc8ca6 JW	1	#include <smi.h>
	2	#include <pci.h>
	3	#include <io.h>
	4	#include <stdint.h>
4fb81ad0	5	#include <vga-overlay.h>
cc80dccf	6	#include <reg-82801b.h>
85bc8ca6	7
9cfcd0ca	8	static uint16_t _get_PMBASE()
85bc8ca6	9	{
199c2b1b JW	10	static long pmbase = -1;
	11
	12	if (pmbase == -1) /* Memoize it so that we don't have to hit PCI so often. */
	13	pmbase = pci_read32(ICH2_LPC_BUS, ICH2_LPC_DEV, ICH2_LPC_FN, ICH2_LPC_PCI_PMBASE) & ICH2_PMBASE_MASK;
	14
	15	return pmbase;
85bc8ca6 JW	16	}
	17
	18	void smi_disable()
	19	{
cc80dccf JW	20	unsigned short smi_en = _get_PMBASE() + ICH2_PMBASE_SMI_EN;
cc80dccf JW	21	outl(smi_en, inl(smi_en) & ~ICH2_SMI_EN_GBL_SMI_EN);
85bc8ca6 JW	22	}
	23
	24	void smi_enable()
	25	{
cc80dccf JW	26	unsigned short smi_en = _get_PMBASE() + ICH2_PMBASE_SMI_EN;
cc80dccf JW	27	outl(smi_en, inl(smi_en) \| ICH2_SMI_EN_GBL_SMI_EN);
85bc8ca6 JW	28	}
	29
	30	unsigned long smi_status()
	31	{
cc80dccf	32	unsigned short smi_sts = _get_PMBASE() + ICH2_PMBASE_SMI_STS;
85bc8ca6 JW	33	return inl(smi_sts);
85bc8ca6 JW	34	}
d71d9872	35
4fb81ad0 JW	36	void smi_poll()
	37	{
	38	unsigned long sts = smi_status();
	39
	40	if (sts & ICH2_SMI_STS_BIOS_STS)
	41	{
	42	dolog("Unhandled: BIOS_STS");
	43	outl(_get_PMBASE() + ICH2_PMBASE_SMI_STS, ICH2_SMI_STS_BIOS_STS);
	44	}
	45
	46	if (sts & ICH2_SMI_STS_LEGACY_USB_STS)
	47	{
	48	dolog("Unhandled: LEGACY_USB_STS");
	49	outl(_get_PMBASE() + ICH2_PMBASE_SMI_STS, ICH2_SMI_STS_LEGACY_USB_STS);
	50	}
	51
	52	if (sts & ICH2_SMI_STS_SLP_SMI_STS)
	53	{
	54	dolog("Unhandled: SLP_SMI_STS");
	55	outl(_get_PMBASE() + ICH2_PMBASE_SMI_STS, ICH2_SMI_STS_SLP_SMI_STS);
	56	}
	57
	58	if (sts & ICH2_SMI_STS_APM_STS)
	59	{
	60	dolog("Unhandled: APM_STS");
199c2b1b	61	outl(_get_PMBASE() + ICH2_PMBASE_SMI_STS, ICH2_SMI_STS_APM_STS);
4fb81ad0 JW	62	}
	63
	64	if (sts & ICH2_SMI_STS_SWSMI_TMR_STS) // Ack it, then request another.
	65	{
199c2b1b	66	outl(_get_PMBASE() + ICH2_PMBASE_SMI_STS, ICH2_SMI_STS_SWSMI_TMR_STS);
4fb81ad0 JW	67	outl(_get_PMBASE() + ICH2_PMBASE_SMI_EN,
	68	inl(_get_PMBASE() + ICH2_PMBASE_SMI_EN) & ~ICH2_SMI_EN_SWSMI_TMR_EN);
	69	outl(_get_PMBASE() + ICH2_PMBASE_SMI_EN,
	70	inl(_get_PMBASE() + ICH2_PMBASE_SMI_EN) \| ICH2_SMI_EN_SWSMI_TMR_EN);
	71	}
	72
	73	if (sts & ICH2_SMI_STS_PM1_STS_REG)
	74	{
199c2b1b JW	75	unsigned short pm1_sts = inw(_get_PMBASE() + ICH2_PMBASE_PM1_STS);
	76	unsigned short pm1_en = inw(_get_PMBASE() + ICH2_PMBASE_PM1_EN);
	77
	78	pm1_sts &= pm1_en;
	79	if (pm1_sts & ICH2_PM1_STS_RTC_STS)
	80	{
	81	dolog("Unhandled: PM1_STS: RTC_STS");
	82	outw(_get_PMBASE() + ICH2_PMBASE_PM1_STS, ICH2_PM1_STS_RTC_STS);
	83	}
	84
	85	if (pm1_sts & ICH2_PM1_STS_PWRBTN_STS)
	86	{
	87	dolog("Unhandled: PM1_STS: PWRBTN_STS");
	88	outw(_get_PMBASE() + ICH2_PMBASE_PM1_STS, ICH2_PM1_STS_PWRBTN_STS);
	89	}
	90
	91	if (pm1_sts & ICH2_PM1_STS_GBL_STS)
	92	{
	93	dolog("Unhandled: PM1_STS: GBL_STS");
	94	outw(_get_PMBASE() + ICH2_PMBASE_PM1_STS, ICH2_PM1_STS_GBL_STS);
	95	}
	96
	97	if (pm1_sts & ICH2_PM1_STS_TMROF_STS)
	98	{
	99	dolog("Unhandled: PM1_STS: TMROF_STS");
	100	outw(_get_PMBASE() + ICH2_PMBASE_PM1_STS, ICH2_PM1_STS_TMROF_STS);
	101	}
	102
	103	outl(_get_PMBASE() + ICH2_PMBASE_SMI_STS, ICH2_SMI_STS_PM1_STS_REG);
4fb81ad0 JW	104	}
	105
	106	if (sts & ICH2_SMI_STS_GPE0_STS)
	107	{
	108	/* XXX -- trawl through GPE0_STS to see what happened */
199c2b1b JW	109	dolog("XXX Unhandled: GPE0_STS (expect lockup)");
	110	}
	111
	112	if (sts & ICH2_SMI_STS_GPE1_STS)
	113	{
	114	/* XXX -- trawl through GPE1_STS to see what happened */
	115	dolog("XXX Unhandled: GPE1_STS (expect lockup)");
4fb81ad0 JW	116	}
	117
	118	if (sts & ICH2_SMI_STS_MCSMI_STS)
	119	{
	120	dolog("Unhandled: MCSMI_STS");
	121	outl(_get_PMBASE() + ICH2_PMBASE_SMI_STS, ICH2_SMI_STS_MCSMI_STS);
	122	}
	123
	124	if (sts & ICH2_SMI_STS_DEVMON_STS)
	125	{
199c2b1b JW	126	unsigned short mon_smi = inw(_get_PMBASE() + ICH2_PMBASE_MON_SMI);
	127	unsigned long devact_sts = inl(_get_PMBASE() + ICH2_PMBASE_DEVACT_STS);
	128	unsigned long devtrap_en = inl(_get_PMBASE() + ICH2_PMBASE_DEVTRAP_EN);
	129	if (((mon_smi & 0x0F00) >> 8) & ((mon_smi & 0xF000) >> 12))
	130	dologf("Unhandled: MON_SMI (%04x)", mon_smi);
	131	if (devact_sts & devtrap_en)
	132	dologf("Unhandled: DEVTRAP (%08x)", devact_sts & devtrap_en);
4fb81ad0 JW	133	}
	134
	135	if (sts & ICH2_SMI_STS_TCO_STS)
	136	{
	137	dolog("Unhandled: TCO_STS");
	138	outl(_get_PMBASE() + ICH2_PMBASE_SMI_STS, ICH2_SMI_STS_TCO_STS);
	139	}
	140
	141	if (sts & ICH2_SMI_STS_PERIODIC_STS)
	142	{
	143	dolog("Unhandled: PERIODIC_STS");
	144	outl(_get_PMBASE() + ICH2_PMBASE_SMI_STS, ICH2_SMI_STS_PERIODIC_STS);
	145	}
	146
	147	if (sts & ICH2_SMI_STS_SERIRQ_SMI_STS)
	148	{
	149	dolog("Unhandled: SERIRQ_SMI_STS");
	150	outl(_get_PMBASE() + ICH2_PMBASE_SMI_STS, ICH2_SMI_STS_SERIRQ_SMI_STS);
	151	}
	152
	153	if (sts & ICH2_SMI_STS_SMBUS_SMI_STS)
	154	{
	155	dolog("Unhandled: SMBUS_SMI_STS");
	156	outl(_get_PMBASE() + ICH2_PMBASE_SMI_STS, ICH2_SMI_STS_SMBUS_SMI_STS);
	157	}
	158
199c2b1b JW	159	if (smi_status() & ~ICH2_SMI_STS_PM1_STS_REG) /* Either the chipset is buggy, or we are. */
199c2b1b JW	160	dologf("WARN: couldn't clear SMI_STS! (%08x)", smi_status());
4fb81ad0 JW	161
	162	outl(_get_PMBASE() + ICH2_PMBASE_SMI_EN,
	163	inl(_get_PMBASE() + ICH2_PMBASE_SMI_EN) \|
	164	ICH2_SMI_EN_EOS \|
	165	ICH2_SMI_EN_GBL_SMI_EN);
	166	}