]> Joshua Wise's Git repositories - mandelfpga.git/blame - shnasto.cmd
Optimization baseline, 70.493MHz, 4913 Slices, 1843 slice FFs, 9065 LUTs
[mandelfpga.git] / shnasto.cmd
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1setMode -bs
2setCable -port svf -file "/home/joshua/projects/fpga/MandelFPGA/test.svf"
3addDevice -p 1 -file "/home/joshua/projects/fpga/MandelFPGA/MandelTop.bit"
4addDevice -p 2 -part xcf04s
5Program -p 1 -defaultVersion 0
6quit
7
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