Optimization baseline, 70.493MHz, 4913 Slices, 1843 slice FFs, 9065 LUTs

diff --git a/Main.v b/Main.v
index 306c8a75ba23b6da4790bc97c62430dd436cca52..673b31c068dd6c5697e6cb88e83d9dcd4670ebc3 100644 (file)
--- a/Main.v
+++ b/Main.v
@@ -1,4 +1,4 @@
-/*
+/* 
  * MandelFPGA
  * by Joshua Wise and Chris Lu
  *