]> Joshua Wise's Git repositories - fpgaboy.git/history - Uart.v
Add a dirty hack to make the sim pipe directly to the readout script.
[fpgaboy.git] / Uart.v
2008-05-03 Joshua WiseAdd some verilator and isim compatibility
2008-04-07 Joshua WiseALU8IMM
2008-04-06 Joshua WiseClean up some warnings.
2008-04-02 Joshua WiseFix bug in UART where idle state is not entered by...
2008-04-01 Joshua WiseJP
2008-04-01 Joshua WiseSpit lots of A out of the UART.
2008-03-31 Joshua WiseHALP ABOUT TO BLOW AWY PROJECT
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