Add ld (bc/de),a, ld a,(bc/de)

diff --git a/GBZ80Core.v b/GBZ80Core.v
index 73785c543af40922f3587a01a228b355f449764c..3931bddfe007bdfa3584b846bcb0938bd6487e7f 100644 (file)
--- a/GBZ80Core.v
+++ b/GBZ80Core.v
@@ -73,6 +73,7 @@
 `define INSN_INCDEC_reg8       8'b00xxx10x
 `define INSN_LD8M_A            8'b111x0000     // 1111 for ld A, x; 1110 for ld x, A; bit 1 specifies 16m8 or 8m8
 `define INSN_LD16M_A           8'b111x1010     // 1111 for ld A, x; 1110 for ld x, A; bit 1 specifies 16m8 or 8m8
 `define INSN_INCDEC_reg8       8'b00xxx10x
 `define INSN_LD8M_A            8'b111x0000     // 1111 for ld A, x; 1110 for ld x, A; bit 1 specifies 16m8 or 8m8
 `define INSN_LD16M_A           8'b111x1010     // 1111 for ld A, x; 1110 for ld x, A; bit 1 specifies 16m8 or 8m8

+`define INSN_LDBCDE_A          8'b000xx010     // 0000 for BC, 0001 for DE, 1010 for A,(x), 0010 for (x),A

 
 `define INSN_cc_NZ             2'b00
 `define INSN_cc_Z              2'b01
 
 `define INSN_cc_NZ             2'b00
 `define INSN_cc_Z              2'b01

diff --git a/Makefile b/Makefile
index 0aaf564fa1c874841d649f1bd29375cc4cb2a6e3..cf89f734a63f486024125f7c80d5ec339d113a32 100644 (file)
--- a/Makefile
+++ b/Makefile
@@ -5,7 +5,8 @@ VLOGS = 7seg.v GBZ80Core.v insn_call-callcc.v insn_incdec16.v \
        insn_ld_sp_hl.v insn_pop_reg.v insn_rst.v System.v CPUDCM.v \
        insn_alu_a.v insn_halt.v insn_jp-jpcc.v insn_ld_hl_reg.v \
        insn_ld_reg_imm8.v insn_ldx_ahl.v insn_push_reg.v insn_vop_intr.v \
        insn_ld_sp_hl.v insn_pop_reg.v insn_rst.v System.v CPUDCM.v \
        insn_alu_a.v insn_halt.v insn_jp-jpcc.v insn_ld_hl_reg.v \
        insn_ld_reg_imm8.v insn_ldx_ahl.v insn_push_reg.v insn_vop_intr.v \

-       Timer.v LCDC.v insn_ldm8_a.v insn_ldm16_a.v Framebuffer.v
+       Timer.v LCDC.v insn_ldm8_a.v insn_ldm16_a.v Framebuffer.v \
+       insn_ldbcde_a.v

 
 all: CoreTop_rom.svf CoreTop_diag.svf CoreTop.twr
 
 
 all: CoreTop_rom.svf CoreTop_diag.svf CoreTop.twr
 

diff --git a/allinsns.v b/allinsns.v
index 8d33aa296e8d50e930dbfd306f040a7fa1214926..0a62af3c9725e31872d04b65292a3c0dca98bb04 100644 (file)
--- a/allinsns.v
+++ b/allinsns.v
@@ -25,3 +25,4 @@
 `include "insn_incdec_reg8.v"
 `include "insn_ldm8_a.v"
 `include "insn_ldm16_a.v"
 `include "insn_incdec_reg8.v"
 `include "insn_ldm8_a.v"
 `include "insn_ldm16_a.v"

+`include "insn_ldbcde_a.v"
\ No newline at end of file

diff --git a/diag.asm b/diag.asm
index e7bb0d4bfa23a6b5ce449e624c55488a08b54ca9..e9a9f19a602d70f15445230fd9a960567194078f 100644 (file)
--- a/diag.asm
+++ b/diag.asm
@@ -94,12 +94,8 @@ putscreen:
        ld hl, $8000    ; Copy two tiles.
        ld de, tiles
        ld c, $20
        ld hl, $8000    ; Copy two tiles.
        ld de, tiles
        ld c, $20

-.cloop:        push hl
-       ld h, d
-       ld l, e
-       ld a, [hl]
+.cloop:        ld a, [de]

        inc de
        inc de

-       pop hl

        ld [hli], a
        ld [hli], a
        dec c
        ld [hli], a
        ld [hli], a
        dec c

diff --git a/insn_ldbcde_a.v b/insn_ldbcde_a.v
new file mode 100644 (file)
index 0000000..2a91dc6
--- /dev/null
+++ b/insn_ldbcde_a.v
@@ -0,0 +1,26 @@
+`ifdef EXECUTE
+       `INSN_LDBCDE_A: begin
+               case (cycle)
+               0:      if (opcode[3]) begin
+                               if (opcode[4]) begin `EXEC_READ(`_DE) end
+                               else begin `EXEC_READ(`_BC) end
+                       end else begin
+                               if (opcode[4]) begin `EXEC_WRITE(`_DE, `_A) end
+                               else begin `EXEC_WRITE(`_BC, `_A) end
+                       end
+               1:      begin
+                               `EXEC_INC_PC
+                               `EXEC_NEWCYCLE
+                       end
+               endcase
+       end
+`endif
+
+`ifdef WRITEBACK
+       `INSN_LDBCDE_A: begin
+               case (cycle)
+               0:      begin end
+               1:      if (opcode[3]) `_A <= rdata;
+               endcase
+       end
+`endif