]> Joshua Wise's Git repositories - fpgaboy.git/blob - core/insn_incdec16.v
Move the core to core/
[fpgaboy.git] / core / insn_incdec16.v
1 `ifdef EXECUTE
2         `INSN_INCDEC16: begin
3                 case (cycle)
4                 0:      case (opcode[5:4])
5                         `INSN_reg16_BC: {tmp,tmp2} <= `_BC;
6                         `INSN_reg16_DE: {tmp,tmp2} <= `_DE;
7                         `INSN_reg16_HL: {tmp,tmp2} <= `_HL;
8                         `INSN_reg16_SP: {tmp,tmp2} <= `_SP;
9                         endcase
10                 1:      begin
11                                 `EXEC_INC_PC
12                                 `EXEC_NEWCYCLE
13                         end
14                 endcase
15         end
16 `endif
17
18 `ifdef WRITEBACK
19         `INSN_INCDEC16: begin
20                 case (cycle)
21                 0:      {tmp,tmp2} <= {tmp,tmp2} +
22                                 (opcode[3] ? 16'hFFFF : 16'h0001);
23                 1:      case (opcode[5:4])
24                         `INSN_reg16_BC: `_BC <= {tmp,tmp2};
25                         `INSN_reg16_DE: `_DE <= {tmp,tmp2};
26                         `INSN_reg16_HL: `_HL <= {tmp,tmp2};
27                         `INSN_reg16_SP: `_SP <= {tmp,tmp2};
28                         endcase
29                 endcase
30         end
31 `endif
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