Move the core to core/

[fpgaboy.git] / core / insn_incdec16.v

`ifdef EXECUTE
	`INSN_INCDEC16: begin
		case (cycle)
		0:	case (opcode[5:4])
			`INSN_reg16_BC:	{tmp,tmp2} <= `_BC;
			`INSN_reg16_DE:	{tmp,tmp2} <= `_DE;
			`INSN_reg16_HL:	{tmp,tmp2} <= `_HL;
			`INSN_reg16_SP:	{tmp,tmp2} <= `_SP;
			endcase
		1:	begin
				`EXEC_INC_PC
				`EXEC_NEWCYCLE
			end
		endcase
	end
`endif

`ifdef WRITEBACK
	`INSN_INCDEC16: begin
		case (cycle)
		0:	{tmp,tmp2} <= {tmp,tmp2} +
				(opcode[3] ? 16'hFFFF : 16'h0001);
		1:	case (opcode[5:4])
			`INSN_reg16_BC:	`_BC <= {tmp,tmp2};
			`INSN_reg16_DE:	`_DE <= {tmp,tmp2};
			`INSN_reg16_HL:	`_HL <= {tmp,tmp2};
			`INSN_reg16_SP:	`_SP <= {tmp,tmp2};
			endcase
		endcase
	end
`endif