Split out more insns
[fpgaboy.git] / insn_alu_a.v
1 `ifdef EXECUTE
2         `INSN_ALU_A: begin
3                 `EXEC_NEWCYCLE;
4                 `EXEC_INC_PC;
5         end
6 `endif
7
8 `ifdef WRITEBACK
9         `INSN_ALU_A: begin
10                 case(opcode[5:3])
11                 `INSN_alu_RLCA: begin
12                         registers[`REG_A] <= {registers[`REG_A][6:0],registers[`REG_A][7]};
13                         registers[`REG_F] <= {registers[`REG_F][7:5],registers[`REG_A][7],registers[`REG_F][3:0]};
14                 end
15                 `INSN_alu_RRCA: begin
16                         registers[`REG_A] <= {registers[`REG_A][0],registers[`REG_A][7:1]};
17                         registers[`REG_F] <= {registers[`REG_F][7:5],registers[`REG_A][0],registers[`REG_F][3:0]};
18                 end
19                 `INSN_alu_RLA: begin
20                         registers[`REG_A] <= {registers[`REG_A][6:0],registers[`REG_F][4]};
21                         registers[`REG_F] <= {registers[`REG_F][7:5],registers[`REG_A][7],registers[`REG_F][3:0]};
22                 end
23                 `INSN_alu_RRA: begin
24                         registers[`REG_A] <= {registers[`REG_A][4],registers[`REG_A][7:1]};
25                         registers[`REG_F] <= {registers[`REG_F][7:5],registers[`REG_A][0],registers[`REG_F][3:0]};
26                 end
27                 `INSN_alu_CPL: begin
28                         registers[`REG_A] <= ~registers[`REG_A];
29                         registers[`REG_F] <= {registers[`REG_F][7],1'b1,1'b1,registers[`REG_F][4:0]};
30                 end
31                 `INSN_alu_SCF: begin
32                         registers[`REG_F] <= {registers[`REG_F][7:5],1'b1,registers[`REG_F][3:0]};
33                 end
34                 `INSN_alu_CCF: begin
35                         registers[`REG_F] <= {registers[`REG_F][7:5],~registers[`REG_F][4],registers[`REG_F][3:0]};
36                 end
37                 endcase
38         end
39 `endif
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