]> Joshua Wise's Git repositories - fpgaboy.git/blame - diag.asm
Fix bugs in SCF and CCF
[fpgaboy.git] / diag.asm
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1 SECTION "a",HOME[$00]
2
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3start: ld a, $AA
4 ld [$FF51], a
5 jr start
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6
7 section "vbl",HOME[$40]
8 jp vbl
9
10 section "lcdc",HOME[$48]
11 jp lcdc
12
13 section "tmro",HOME[$50]
14 jp tmro
5bac4cf0 15
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16 SECTION "b",HOME[$100]
17boot: jr main ; $0100
18 nop ; $0102
19 nop ; $0103
20 ;Nintendo Logo ; $0104
21 DB $CE,$ED,$66,$66,$CC,$0D,$00,$0B,$03,$73,$00,$83,$00,$0C,$00,$0D
22 DB $00,$08,$11,$1F,$88,$89,$00,$0E,$DC,$CC,$6E,$E6,$DD,$DD,$D9,$99
23 DB $BB,$BB,$67,$63,$6E,$0E,$EC,$CC,$DD,$DC,$99,$9F,$BB,$B9,$33,$3E
24 ;$0134
25 DB $00,$E7,$00,$00,$00,$00,$00,$00, $00,$00,$00,$00,$00,$00,$00,$00
26 ;$0144
27 DB $00,$00,$00,$00,$00,$00,$00,$00, $00,$00,$00,$00,$00,$00,$00,$00
28
5bac4cf0 29main:
5bac4cf0 30 ld a, $FF
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31 ld c, $51
32 ld [c], a
00573fd5 33
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34 ld sp, $DFF0
35
30ef1ae0 36 ld a, $04 ;start timer, 4.096KHz
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37 ld c, $07
38 ld [c], a
03202f62 39
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40 ld hl, $DF81
41 xor a
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42 ld [hli], a
43 ld [hli], a
30ef1ae0 44
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45 ld hl, signon
46 call puts
39a68cde 47
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48 ld a, $91
49 ld [$FF40], a
50
39a68cde 51 call putscreen
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52
53 ei
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54
55 call memtest
56
57 call insntest
58
59 call waitsw
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60
61 di
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62
63 jr main
64
65signon:
66 db $0D,$0A,$1B,"[1mFPGABoy Diagnostic ROM",$1B,"[0m",$0D,$0A,0
67
0dea04d3 68tiles:
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69 db %01111100
70 db %11000110
71 db %11000110
72 db %11111110
73 db %11000110
74 db %11000110
75 db %11000110
0dea04d3 76 db %00000000
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77
78 db %11111100
79 db %11000110
80 db %11000110
81 db %11111100
82 db %11000110
83 db %11000110
84 db %11111100
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85 db %00000000
86
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87 db %01111100
88 db %11000110
89 db %11000010
90 db %11000000
91 db %11000010
92 db %11000110
93 db %01111100
94 db %00000000
95
96 db %11111100
97 db %11000110
98 db %11000110
99 db %11000110
100 db %11000110
101 db %11000110
102 db %11111100
103 db %00000000
104
39a68cde 105putscreen:
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106 LD A,$fc ; $001d Setup BG palette
107 LD [$FF47],A ; $001f
108
4d90f272 109 ; Wait for vblank
80ecd2fe 110 call .vblwait
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111
112 ld hl, $8000 ; Copy two tiles.
0dea04d3 113 ld de, tiles
14778cde 114 ld c, $20
4fd47c85 115.cloop: ld a, [de]
0dea04d3 116 inc de
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117 ld [hli], a
118 ld [hli], a
0dea04d3 119 dec c
39a68cde 120 xor a
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121 cp c
122 jr nz, .cloop
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123
124 ld hl, $9800
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125.vloop: call .vblwait
126 ld c, $40
0dea04d3 127 ld b, 0
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128.loop: ld a, b
129 inc b
130 and $03
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131 ld [hli], a
132 ld a, h
133 cp $9C
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134 ret z
135 dec c
136 xor a
137 cp c
138 jr nz,.loop
139 jr .vloop
140
141.vblwait:
142.stat1: ld a, [$FF41] ; STAT
143 and $03
144 cp $00
145 jp nz, .stat1
146.stat2: ld a, [$FF41]
147 and $03
148 cp $01
149 jr nz, .stat2
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150 ret
151
00573fd5 152vbl:
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153 PUSH AF
154 PUSH BC
155 PUSH DE
156 PUSH HL
157
158 xor a
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159 ld [$FF0F], a
160
80ecd2fe 161 ld a, [$FF51]
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162 bit 7, a
163 jr z, .nothing
164
165 bit 0, a
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166 call nz, .scyup
167
ee31adcb 168 bit 1, a
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169 call nz, .scydown
170
ee31adcb 171 bit 2, a
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172 call nz, .scxup
173
ee31adcb 174 bit 3, a
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175 call nz, .scxdown
176
177.nothing:
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178 POP HL
179 POP DE
180 POP BC
181 POP AF
182
183 RETI
184
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185.scyup: ld hl, $FF42
186 inc [hl]
187 ret
188
189.scydown: ld hl, $FF42
190 dec [hl]
191 ret
192
193.scxup: ld hl, $FF43
194 inc [hl]
195 ret
196
197.scxdown: ld hl, $FF43
198 dec [hl]
199 ret
200
201
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202lcdc:
203 PUSH AF
fe3dc890 204 PUSH BC
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205
206 xor a
f6fa1d6e 207 ld [$FF0F], a
00573fd5 208
fe3dc890 209 POP BC
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210 POP AF
211
212 reti
213
214tmro:
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215 PUSH AF
216 PUSH BC
217 PUSH DE
218 PUSH HL
219
220 xor a
f6fa1d6e 221 ld [$FF0F], a
30ef1ae0 222
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223 ld c, $45 ; LYC
224 ld a, [c]
225 inc a
226 ld [c], a
227
f6fa1d6e 228 ld a, [$DF82]
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229 cp 0
230 jr z, .noprint
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231 ld a, $41 ; print A
232 call putc
7e4f4505 233.noprint:
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234 ld a, [$DF81]
235 inc a
236 ld [$DF81], a
237 ld [$FF51], a
30ef1ae0 238
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239 POP HL
240 POP DE
241 POP BC
242 POP AF
243 RETI
30ef1ae0 244
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245; Memory tester: writes h ^ l to all addresses from C000 to DF80.
246memtest:
247 ld hl,memteststr
248 call puts
249
f6fa1d6e 250 ld hl, $C000 ; Write loop
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251.wr:
252 ld a,h
253 xor l
254 ld [hli],a
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255 ld a, h
256 cp $DF
5bac4cf0 257 jr nz, .wr
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258 ld a, l
259 cp $80
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260 jr nz, .wr
261
f6fa1d6e 262 ld hl, $C000 ; Read loop
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263.rd:
264 ld a,h
265 xor l
266 ld b,a
267 ld a, [hli]
268 cp b
269 jr nz, .memfail
270
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271 ld a, h
272 cp $DF
5bac4cf0 273 jr nz, .rd
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274 ld a, l
275 cp $80
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276 jr nz, .rd
277
278 ld hl, testokstr ; Say we're OK
279 call puts
280 ret
281.memfail: ; Say we failed (sadface)
282 ; decrement hl the easy way
f6fa1d6e 283 dec [hl]
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284 push hl
285 ld hl, failatstr
286 call puts
287 pop hl
288 ld a, h
289 call puthex
290 ld a, l
291 call puthex
292 ld a, $0A
293 call putc
294 ld a, $0D
295 call putc
296 ret
297memteststr:
298 db "Testing memory from $C000 to $DF80...",0
299testokstr:
300 db " OK!",$0D,$0A,0
301failatstr:
302 db " Test failed at $",0
303
304puthex: ; Put two hex nibbles to the serial console.
305 push af
306 rra
307 rra
308 rra
309 rra
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310 and $0F
311 add $30
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312 call putc
313 pop af
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314 and $0F
315 add $30
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316 call putc
317 ret
318
319; Wait for switches to be flipped on and off again.
320waitsw:
321 ld hl,waitswstr
322 call puts
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323
324 ld hl,$DF82
325 ld a, 1
326 ld [hl], a
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327
328 ld c, $51
329 xor a
330 ld [c],a
331
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332.loop1:
333 ld a,[c]
f888201b 334 cp $0
5bac4cf0 335 jr z,.loop1
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336
337.loop2: ld a,[c]
f888201b 338 cp $0
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339 jr nz,.loop2
340 ret
341
342waitswstr:
343 db "Diagnostic ROM complete; flip switches to nonzero and then to zero to reset. Expect A.",$0D,$0A,0
344
345; Core instruction basic acceptance tests.
346insntest:
347 ld hl, .insnteststr
348 call puts
349
350 ; Test PUSH and POP.
351 ld b, $12
352 ld c, $34
353 ld d, $56
354 ld e, $78
355 push bc
356 pop de
357 ld hl, .pushpopfail
358 ld a, d
359 cp b
360 jr nz,.fail
361 ld a, e
362 cp c
363 jr nz,.fail
364
365 ; Test ALU (HL).
366 ld hl, .ff
367 ld a, $FF
368 xor [hl]
369 ld hl, .xorhlfail
370 jr nz, .fail
371
372 ; Test JP (HL)
373 ld hl, .jphl
374 jp [hl]
375 ld hl, .jphlfail
376 jr .fail
377 rst $00
378.jphl:
379
380 ; Test JR
381 ld a, $FF
f888201b 382 cp $0
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383 jr nz,.jr
384 ld hl, .jrfail
385 jr .fail
386 rst $00
387.jr:
388
389 ; Test inc16
390 ld d, $12
391 ld e, $FF
392 ld hl, .inc16fail
393 inc de
394 ld a, $13
395 cp d
396 jr nz, .fail
397 ld a, $00
398 cp e
399 jr nz, .fail
400
401 ; Test CP.
402 ld hl, .cpfail
403 ld a, $10
f888201b 404 cp $20
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405 jr nc,.fail
406 ld a, $20
f888201b 407 cp $10
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408 jr c,.fail
409
410 ; Test CPL
411 ld hl, .cplfail
412 ld a, $55
5bac4cf0 413 cpl
f888201b 414 cp $AA
5bac4cf0 415 jr nz,.fail
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416
417 ; Test DI/EI delay
418 di
00573fd5 419 ld hl, .dinocausefail
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420 ld c, $0F ; First, wait until an interrupt happens...
421.wait: ld a, [c]
00573fd5 422 and $04
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423 cp 0
424 jr z, .wait
425 ei ; Now make sure that an IRQ didn't happen on EI/DI
426 di
427 ld a, [c]
00573fd5 428 and $04
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429 cp 0
430 jr z, .fail
00573fd5 431 ld hl, .dicausefail
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432 ei ; Make sure that an IRQ does happen on EI/NOP/DI
433 nop
00573fd5 434 nop
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435 di
436 ld a, [c]
00573fd5 437 and $04
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438 cp 0
439 jr nz, .fail
440 ei
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441
442 ld hl, .ok
443 call puts
444 ret
445.fail:
f9000d73 446 ei
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447 call puts
448 ld hl, .testfailed
449 call puts
450 ret
451.insnteststr:
452 db "Testing instructions... ",0
453.pushpopfail:
454 db "PUSH/POP",0
455.ff:
456 db $FF
457.xorhlfail:
458 db "XOR [HL]",0
459.jphlfail:
460 db "JP [HL]",0
461.jrfail:
462 db "JR",0
463.cpfail:
464 db "CP",0
465.cplfail:
466 db "CPL",0
467.inc16fail:
468 db "INC16",0
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469.dinocausefail:
470 db "DI/EI does not cause interrupt",0
471.dicausefail:
472 db "DI/NOP/EI cause interrupt",0
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473.testfailed:
474 db " test failed.",$0D,$0A,0
475.ok:
476 db "OK!",$0D,$0A,0
477
478; Serial port manipulation functions.
479putc:
3db3fc27 480 ld c, $53
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481 push af
482.waitport:
483 ld a,[c]
3db3fc27 484 and $01
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485 jr nz,.waitport
486 pop af
3db3fc27 487 ld [$FF52],a
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488 ret
489
490puts:
491 ld a, [hli]
f888201b 492 cp $00
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493 ret z
494 call putc
495 jr puts
fe3dc890 496
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