Add mock up LCDC
[fpgaboy.git] / diag.asm
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1 SECTION "a",HOME
2
3main:
5bac4cf0 4 ld a, $FF
537e1f83 5 ld [$FF51],a
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6
7 ld sp, $DFF0
8
30ef1ae0 9 ld a, $04 ;start timer, 4.096KHz
537e1f83 10 ld [$FF07], a
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11
12 ld hl, $DF81
13 xor a
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14 ld [hli], a
15 ld [hli], a
30ef1ae0 16
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17 ld hl, signon
18 call puts
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19
20 ei
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21
22 call memtest
23
24 call insntest
25
26 call waitsw
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27
28 di
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29
30 jr main
31
32signon:
33 db $0D,$0A,$1B,"[1mFPGABoy Diagnostic ROM",$1B,"[0m",$0D,$0A,0
34
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35 section "fuq",HOME[$100]
36irqhand:
37 PUSH AF
38 PUSH BC
39 PUSH DE
40 PUSH HL
41
42 xor a
537e1f83 43 ld [$FF0F], a
30ef1ae0 44
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45 ld hl, $DF82
46 ld a, [hld]
47 cp 0
48 jr z, .noprint
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49 ld a, $41 ; print A
50 call putc
7e4f4505 51.noprint:
f9000d73 52 inc [hl]
30ef1ae0 53 ld a, [hl]
537e1f83 54 ld [$FF51], a
30ef1ae0 55
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56 POP HL
57 POP DE
58 POP BC
59 POP AF
60 RETI
30ef1ae0 61
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62; Memory tester: writes h ^ l to all addresses from C000 to DF80.
63memtest:
64 ld hl,memteststr
65 call puts
66
67 ld hl, $C001 ; Write loop
68.wr:
69 ld a,h
70 xor l
71 ld [hli],a
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72 ld a, h
73 cp $DF
5bac4cf0 74 jr nz, .wr
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75 ld a, l
76 cp $80
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77 jr nz, .wr
78
79 ld hl, $C001 ; Read loop
80.rd:
81 ld a,h
82 xor l
83 ld b,a
84 ld a, [hli]
85 cp b
86 jr nz, .memfail
87
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88 ld a, h
89 cp $DF
5bac4cf0 90 jr nz, .rd
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91 ld a, l
92 cp $80
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93 jr nz, .rd
94
95 ld hl, testokstr ; Say we're OK
96 call puts
97 ret
98.memfail: ; Say we failed (sadface)
99 ; decrement hl the easy way
100 ld a,[hld]
101 push hl
102 ld hl, failatstr
103 call puts
104 pop hl
105 ld a, h
106 call puthex
107 ld a, l
108 call puthex
109 ld a, $0A
110 call putc
111 ld a, $0D
112 call putc
113 ret
114memteststr:
115 db "Testing memory from $C000 to $DF80...",0
116testokstr:
117 db " OK!",$0D,$0A,0
118failatstr:
119 db " Test failed at $",0
120
121puthex: ; Put two hex nibbles to the serial console.
122 push af
123 rra
124 rra
125 rra
126 rra
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127 and $0F
128 add $30
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129 call putc
130 pop af
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131 and $0F
132 add $30
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133 call putc
134 ret
135
136; Wait for switches to be flipped on and off again.
137waitsw:
138 ld hl,waitswstr
139 call puts
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140
141 ld hl,$DF82
142 ld a, 1
143 ld [hl], a
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144
145 ld c, $51
146 xor a
147 ld [c],a
148
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149.loop1:
150 ld a,[c]
f888201b 151 cp $0
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152 jr z,.loop1
153.loop2:
154 ld a,[c]
f888201b 155 cp $0
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156 jr nz,.loop2
157 ret
158
159waitswstr:
160 db "Diagnostic ROM complete; flip switches to nonzero and then to zero to reset. Expect A.",$0D,$0A,0
161
162; Core instruction basic acceptance tests.
163insntest:
164 ld hl, .insnteststr
165 call puts
166
167 ; Test PUSH and POP.
168 ld b, $12
169 ld c, $34
170 ld d, $56
171 ld e, $78
172 push bc
173 pop de
174 ld hl, .pushpopfail
175 ld a, d
176 cp b
177 jr nz,.fail
178 ld a, e
179 cp c
180 jr nz,.fail
181
182 ; Test ALU (HL).
183 ld hl, .ff
184 ld a, $FF
185 xor [hl]
186 ld hl, .xorhlfail
187 jr nz, .fail
188
189 ; Test JP (HL)
190 ld hl, .jphl
191 jp [hl]
192 ld hl, .jphlfail
193 jr .fail
194 rst $00
195.jphl:
196
197 ; Test JR
198 ld a, $FF
f888201b 199 cp $0
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200 jr nz,.jr
201 ld hl, .jrfail
202 jr .fail
203 rst $00
204.jr:
205
206 ; Test inc16
207 ld d, $12
208 ld e, $FF
209 ld hl, .inc16fail
210 inc de
211 ld a, $13
212 cp d
213 jr nz, .fail
214 ld a, $00
215 cp e
216 jr nz, .fail
217
218 ; Test CP.
219 ld hl, .cpfail
220 ld a, $10
f888201b 221 cp $20
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222 jr nc,.fail
223 ld a, $20
f888201b 224 cp $10
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225 jr c,.fail
226
227 ; Test CPL
228 ld hl, .cplfail
229 ld a, $55
5bac4cf0 230 cpl
f888201b 231 cp $AA
5bac4cf0 232 jr nz,.fail
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233
234 ; Test DI/EI delay
235 di
236 ld hl, .difail
237 ld c, $0F ; First, wait until an interrupt happens...
238.wait: ld a, [c]
239 cp 0
240 jr z, .wait
241 ei ; Now make sure that an IRQ didn't happen on EI/DI
242 di
243 ld a, [c]
244 cp 0
245 jr z, .fail
246 ei ; Make sure that an IRQ does happen on EI/NOP/DI
247 nop
248 di
249 ld a, [c]
250 cp 0
251 jr nz, .fail
252 ei
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253
254 ld hl, .ok
255 call puts
256 ret
257.fail:
f9000d73 258 ei
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259 call puts
260 ld hl, .testfailed
261 call puts
262 ret
263.insnteststr:
264 db "Testing instructions... ",0
265.pushpopfail:
266 db "PUSH/POP",0
267.ff:
268 db $FF
269.xorhlfail:
270 db "XOR [HL]",0
271.jphlfail:
272 db "JP [HL]",0
273.jrfail:
274 db "JR",0
275.cpfail:
276 db "CP",0
277.cplfail:
278 db "CPL",0
279.inc16fail:
280 db "INC16",0
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281.difail:
282 db "DI/EI delay",0
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283.testfailed:
284 db " test failed.",$0D,$0A,0
285.ok:
286 db "OK!",$0D,$0A,0
287
288; Serial port manipulation functions.
289putc:
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290 ld c, $50
291 push af
292.waitport:
293 ld a,[c]
f888201b 294 cp $00
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295 jr nz,.waitport
296 pop af
297 ld [c],a
298 ret
299
300puts:
301 ld a, [hli]
f888201b 302 cp $00
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303 ret z
304 call putc
305 jr puts
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