Remove gated clock and hence remove S.
[fpgaboy.git] / insn_alu8.v
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3ad960bd 1`ifdef EXECUTE
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2 `INSN_ALU8,`INSN_ALU8IMM: begin
3 if ((opcode[7:6] == 2'b11) && (cycle == 0)) begin // alu8imm
4 `EXEC_INC_PC
5 `EXEC_READ(`_PC + 1)
6 end else if ((opcode[2:0] == `INSN_reg_dHL) && (cycle == 0))
5c33c5c0 7 `EXEC_READ(`_HL)
5509558d 8 else begin
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9 `EXEC_NEWCYCLE
10 `EXEC_INC_PC
3ad960bd 11 case (opcode[2:0])
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12 `INSN_reg_A: tmp <= `_A;
13 `INSN_reg_B: tmp <= `_B;
14 `INSN_reg_C: tmp <= `_C;
15 `INSN_reg_D: tmp <= `_D;
16 `INSN_reg_E: tmp <= `_E;
17 `INSN_reg_H: tmp <= `_H;
18 `INSN_reg_L: tmp <= `_L;
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19 `INSN_reg_dHL: tmp <= rdata;
20 endcase
21 end
22 end
23`endif
24
25`ifdef WRITEBACK
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26 `INSN_ALU8,`INSN_ALU8IMM: begin
27 if (((opcode[2:0] == `INSN_reg_dHL) || (opcode[7:6] == 2'b11)) && (cycle == 0)) begin
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28 /* Sit on our asses. */
29 end else begin /* Actually do the computation! */
30 case (opcode[5:3])
31 `INSN_alu_ADD: begin
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32 `_A <= `_A + tmp;
33 `_F <= { /* Z */ ((`_A + tmp) == 0) ? 1'b1 : 1'b0,
3ad960bd 34 /* N */ 1'b0,
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35 /* H */ (({1'b0,`_A[3:0]} + {1'b0,tmp[3:0]}) >> 4 == 1) ? 1'b1 : 1'b0,
36 /* C */ (({1'b0,`_A} + {1'b0,tmp}) >> 8 == 1) ? 1'b1 : 1'b0,
37 `_F[3:0]
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38 };
39 end
40 `INSN_alu_ADC: begin
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41 `_A <= `_A + tmp + {7'b0,`_F[4]};
42 `_F <= { /* Z */ ((`_A + tmp + {7'b0,`_F[4]}) == 0) ? 1'b1 : 1'b0,
3ad960bd 43 /* N */ 1'b0,
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44 /* H */ (({1'b0,`_A[3:0]} + {1'b0,tmp[3:0]} + {4'b0,`_F[4]}) >> 4 == 1) ? 1'b1 : 1'b0,
45 /* C */ (({1'b0,`_A} + {1'b0,tmp} + {8'b0,`_F[4]}) >> 8 == 1) ? 1'b1 : 1'b0,
46 `_F[3:0]
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47 };
48 end
49 `INSN_alu_SUB: begin
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50 `_A <= `_A - tmp;
51 `_F <= { /* Z */ (`_A == tmp) ? 1'b1 : 1'b0,
3ad960bd 52 /* N */ 1'b1,
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53 /* H */ (tmp[3:0] > `_A[3:0]) ? 1'b1 : 1'b0,
54 /* C */ (tmp > `_A) ? 1'b1 : 1'b0,
55 `_F[3:0]
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56 };
57 end
58 `INSN_alu_SBC: begin
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59 `_A <= `_A - (tmp + {7'b0,`_F[4]});
60 `_F <= { /* Z */ ((`_A - (tmp + {7'b0,`_F[4]})) == 0) ? 1'b1 : 1'b0,
3ad960bd 61 /* N */ 1'b1,
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62 /* H */ (({1'b0,tmp[3:0]} + {4'b0,`_F[4]}) > {1'b0,`_A[3:0]}) ? 1'b1 : 1'b0,
63 /* C */ (({1'b0,tmp} + {8'b0,`_F[4]}) > {1'b0,`_A[7:0]}) ? 1'b1 : 1'b0,
64 `_F[3:0]
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65 };
66 end
67 `INSN_alu_AND: begin
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68 `_A <= `_A & tmp;
69 `_F <= { /* Z */ ((`_A & tmp) == 0) ? 1'b1 : 1'b0,
3ad960bd 70 3'b010,
5509558d 71 `_F[3:0]
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72 };
73 end
74 `INSN_alu_OR: begin
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75 `_A <= `_A | tmp;
76 `_F <= { /* Z */ ((`_A | tmp) == 0) ? 1'b1 : 1'b0,
3ad960bd 77 3'b000,
5509558d 78 `_F[3:0]
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79 };
80 end
81 `INSN_alu_XOR: begin
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82 `_A <= `_A ^ tmp;
83 `_F <= { /* Z */ ((`_A ^ tmp) == 0) ? 1'b1 : 1'b0,
3ad960bd 84 3'b000,
5509558d 85 `_F[3:0]
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86 };
87 end
88 `INSN_alu_CP: begin
5509558d 89 `_F <= { /* Z */ (`_A == tmp) ? 1'b1 : 1'b0,
3ad960bd 90 /* N */ 1'b1,
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91 /* H */ (tmp[3:0] > `_A[3:0]) ? 1'b1 : 1'b0,
92 /* C */ (tmp > `_A) ? 1'b1 : 1'b0,
93 `_F[3:0]
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94 };
95 end
96 default:
97 $stop;
98 endcase
99 end
100 end
101`endif
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