]> Joshua Wise's Git repositories - fpgaboy.git/blame - diag.asm
Dual boot ROM support, and the first proof that cellular ram works!
[fpgaboy.git] / diag.asm
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1 section "end",HOME[1024]
2 nop
3
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4 SECTION "a",HOME[$00]
5
6start: jp main
7
8 section "vbl",HOME[$40]
9 jp vbl
10
11 section "lcdc",HOME[$48]
12 jp lcdc
13
14 section "tmro",HOME[$50]
15 jp tmro
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16
17main:
5bac4cf0 18 ld a, $FF
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19 ld c, $51
20 ld [c], a
00573fd5 21
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22 ld sp, $DFF0
23
30ef1ae0 24 ld a, $04 ;start timer, 4.096KHz
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25 ld c, $07
26 ld [c], a
03202f62 27
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28 ld hl, $DF81
29 xor a
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30 ld [hli], a
31 ld [hli], a
30ef1ae0 32
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33 ld hl, signon
34 call puts
39a68cde 35
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36 ld a, $91
37 ld [$FF40], a
38
39a68cde 39 call putscreen
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40
41 ei
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42
43 call memtest
44
45 call insntest
46
47 call waitsw
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48
49 di
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50
51 jr main
52
53signon:
54 db $0D,$0A,$1B,"[1mFPGABoy Diagnostic ROM",$1B,"[0m",$0D,$0A,0
55
0dea04d3 56tiles:
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57 db %01111100
58 db %11000110
59 db %11000110
60 db %11111110
61 db %11000110
62 db %11000110
63 db %11000110
0dea04d3 64 db %00000000
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65
66 db %11111100
67 db %11000110
68 db %11000110
69 db %11111100
70 db %11000110
71 db %11000110
72 db %11111100
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73 db %00000000
74
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75 db %01111100
76 db %11000110
77 db %11000010
78 db %11000000
79 db %11000010
80 db %11000110
81 db %01111100
82 db %00000000
83
84 db %11111100
85 db %11000110
86 db %11000110
87 db %11000110
88 db %11000110
89 db %11000110
90 db %11111100
91 db %00000000
92
39a68cde 93putscreen:
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94 LD A,$fc ; $001d Setup BG palette
95 LD [$FF47],A ; $001f
96
4d90f272 97 ; Wait for vblank
80ecd2fe 98 call .vblwait
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99
100 ld hl, $8000 ; Copy two tiles.
0dea04d3 101 ld de, tiles
14778cde 102 ld c, $20
4fd47c85 103.cloop: ld a, [de]
0dea04d3 104 inc de
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105 ld [hli], a
106 ld [hli], a
0dea04d3 107 dec c
39a68cde 108 xor a
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109 cp c
110 jr nz, .cloop
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111
112 ld hl, $9800
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113.vloop: call .vblwait
114 ld c, $40
0dea04d3 115 ld b, 0
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116.loop: ld a, b
117 inc b
118 and $03
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119 ld [hli], a
120 ld a, h
121 cp $9C
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122 ret z
123 dec c
124 xor a
125 cp c
126 jr nz,.loop
127 jr .vloop
128
129.vblwait:
130.stat1: ld a, [$FF41] ; STAT
131 and $03
132 cp $00
133 jp nz, .stat1
134.stat2: ld a, [$FF41]
135 and $03
136 cp $01
137 jr nz, .stat2
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138 ret
139
00573fd5 140vbl:
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141 PUSH AF
142 PUSH BC
143 PUSH DE
144 PUSH HL
145
146 xor a
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147 ld [$FF0F], a
148
80ecd2fe 149 ld a, [$FF51]
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150 bit 7, a
151 jr z, .nothing
152
153 bit 0, a
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154 call nz, .scyup
155
ee31adcb 156 bit 1, a
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157 call nz, .scydown
158
ee31adcb 159 bit 2, a
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160 call nz, .scxup
161
ee31adcb 162 bit 3, a
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163 call nz, .scxdown
164
165.nothing:
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166 POP HL
167 POP DE
168 POP BC
169 POP AF
170
171 RETI
172
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173.scyup: ld hl, $FF42
174 inc [hl]
175 ret
176
177.scydown: ld hl, $FF42
178 dec [hl]
179 ret
180
181.scxup: ld hl, $FF43
182 inc [hl]
183 ret
184
185.scxdown: ld hl, $FF43
186 dec [hl]
187 ret
188
189
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190lcdc:
191 PUSH AF
fe3dc890 192 PUSH BC
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193
194 xor a
f6fa1d6e 195 ld [$FF0F], a
00573fd5 196
fe3dc890 197 POP BC
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198 POP AF
199
200 reti
201
202tmro:
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203 PUSH AF
204 PUSH BC
205 PUSH DE
206 PUSH HL
207
208 xor a
f6fa1d6e 209 ld [$FF0F], a
30ef1ae0 210
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211 ld c, $45 ; LYC
212 ld a, [c]
213 inc a
214 ld [c], a
215
f6fa1d6e 216 ld a, [$DF82]
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217 cp 0
218 jr z, .noprint
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219 ld a, $41 ; print A
220 call putc
7e4f4505 221.noprint:
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222 ld a, [$DF81]
223 inc a
224 ld [$DF81], a
225 ld [$FF51], a
30ef1ae0 226
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227 POP HL
228 POP DE
229 POP BC
230 POP AF
231 RETI
30ef1ae0 232
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233; Memory tester: writes h ^ l to all addresses from C000 to DF80.
234memtest:
235 ld hl,memteststr
236 call puts
237
f6fa1d6e 238 ld hl, $C000 ; Write loop
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239.wr:
240 ld a,h
241 xor l
242 ld [hli],a
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243 ld a, h
244 cp $DF
5bac4cf0 245 jr nz, .wr
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246 ld a, l
247 cp $80
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248 jr nz, .wr
249
f6fa1d6e 250 ld hl, $C000 ; Read loop
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251.rd:
252 ld a,h
253 xor l
254 ld b,a
255 ld a, [hli]
256 cp b
257 jr nz, .memfail
258
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259 ld a, h
260 cp $DF
5bac4cf0 261 jr nz, .rd
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262 ld a, l
263 cp $80
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264 jr nz, .rd
265
266 ld hl, testokstr ; Say we're OK
267 call puts
268 ret
269.memfail: ; Say we failed (sadface)
270 ; decrement hl the easy way
f6fa1d6e 271 dec [hl]
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272 push hl
273 ld hl, failatstr
274 call puts
275 pop hl
276 ld a, h
277 call puthex
278 ld a, l
279 call puthex
280 ld a, $0A
281 call putc
282 ld a, $0D
283 call putc
284 ret
285memteststr:
286 db "Testing memory from $C000 to $DF80...",0
287testokstr:
288 db " OK!",$0D,$0A,0
289failatstr:
290 db " Test failed at $",0
291
292puthex: ; Put two hex nibbles to the serial console.
293 push af
294 rra
295 rra
296 rra
297 rra
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298 and $0F
299 add $30
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300 call putc
301 pop af
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302 and $0F
303 add $30
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304 call putc
305 ret
306
307; Wait for switches to be flipped on and off again.
308waitsw:
309 ld hl,waitswstr
310 call puts
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311
312 ld hl,$DF82
313 ld a, 1
314 ld [hl], a
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315
316 ld c, $51
317 xor a
318 ld [c],a
319
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320.loop1:
321 ld a,[c]
f888201b 322 cp $0
5bac4cf0 323 jr z,.loop1
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324
325.loop2: ld a,[c]
f888201b 326 cp $0
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327 jr nz,.loop2
328 ret
329
330waitswstr:
331 db "Diagnostic ROM complete; flip switches to nonzero and then to zero to reset. Expect A.",$0D,$0A,0
332
333; Core instruction basic acceptance tests.
334insntest:
335 ld hl, .insnteststr
336 call puts
337
338 ; Test PUSH and POP.
339 ld b, $12
340 ld c, $34
341 ld d, $56
342 ld e, $78
343 push bc
344 pop de
345 ld hl, .pushpopfail
346 ld a, d
347 cp b
348 jr nz,.fail
349 ld a, e
350 cp c
351 jr nz,.fail
352
353 ; Test ALU (HL).
354 ld hl, .ff
355 ld a, $FF
356 xor [hl]
357 ld hl, .xorhlfail
358 jr nz, .fail
359
360 ; Test JP (HL)
361 ld hl, .jphl
362 jp [hl]
363 ld hl, .jphlfail
364 jr .fail
365 rst $00
366.jphl:
367
368 ; Test JR
369 ld a, $FF
f888201b 370 cp $0
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371 jr nz,.jr
372 ld hl, .jrfail
373 jr .fail
374 rst $00
375.jr:
376
377 ; Test inc16
378 ld d, $12
379 ld e, $FF
380 ld hl, .inc16fail
381 inc de
382 ld a, $13
383 cp d
384 jr nz, .fail
385 ld a, $00
386 cp e
387 jr nz, .fail
388
389 ; Test CP.
390 ld hl, .cpfail
391 ld a, $10
f888201b 392 cp $20
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393 jr nc,.fail
394 ld a, $20
f888201b 395 cp $10
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396 jr c,.fail
397
398 ; Test CPL
399 ld hl, .cplfail
400 ld a, $55
5bac4cf0 401 cpl
f888201b 402 cp $AA
5bac4cf0 403 jr nz,.fail
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404
405 ; Test DI/EI delay
406 di
00573fd5 407 ld hl, .dinocausefail
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408 ld c, $0F ; First, wait until an interrupt happens...
409.wait: ld a, [c]
00573fd5 410 and $04
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411 cp 0
412 jr z, .wait
413 ei ; Now make sure that an IRQ didn't happen on EI/DI
414 di
415 ld a, [c]
00573fd5 416 and $04
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417 cp 0
418 jr z, .fail
00573fd5 419 ld hl, .dicausefail
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420 ei ; Make sure that an IRQ does happen on EI/NOP/DI
421 nop
00573fd5 422 nop
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423 di
424 ld a, [c]
00573fd5 425 and $04
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426 cp 0
427 jr nz, .fail
428 ei
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429
430 ld hl, .ok
431 call puts
432 ret
433.fail:
f9000d73 434 ei
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435 call puts
436 ld hl, .testfailed
437 call puts
438 ret
439.insnteststr:
440 db "Testing instructions... ",0
441.pushpopfail:
442 db "PUSH/POP",0
443.ff:
444 db $FF
445.xorhlfail:
446 db "XOR [HL]",0
447.jphlfail:
448 db "JP [HL]",0
449.jrfail:
450 db "JR",0
451.cpfail:
452 db "CP",0
453.cplfail:
454 db "CPL",0
455.inc16fail:
456 db "INC16",0
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457.dinocausefail:
458 db "DI/EI does not cause interrupt",0
459.dicausefail:
460 db "DI/NOP/EI cause interrupt",0
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461.testfailed:
462 db " test failed.",$0D,$0A,0
463.ok:
464 db "OK!",$0D,$0A,0
465
466; Serial port manipulation functions.
467putc:
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468 ld c, $50
469 push af
470.waitport:
471 ld a,[c]
f888201b 472 cp $00
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473 jr nz,.waitport
474 pop af
475 ld [c],a
476 ret
477
478puts:
479 ld a, [hli]
f888201b 480 cp $00
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481 ret z
482 call putc
483 jr puts
fe3dc890 484
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